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authorIvan T. Ivanov <iivanov@mm-sol.com>2015-02-03 14:17:58 +0200
committerOlof Johansson <olof@lixom.net>2015-04-03 13:33:47 -0700
commitaf22e46d3e8e29d7a1edb6f171745e4991d40cf1 (patch)
tree273e4930dd4139ef8d72a75087e5eca7da6b28e4 /arch/arm
parent1e1177bf4c24d593afddf40f9f63538136aee6c9 (diff)
downloadtalos-obmc-linux-af22e46d3e8e29d7a1edb6f171745e4991d40cf1.tar.gz
talos-obmc-linux-af22e46d3e8e29d7a1edb6f171745e4991d40cf1.zip
arm: dts: qcom: Add SPMI PMIC Arbiter nodes for APQ8084 and MSM8974
Add SPMI PMIC Arbiter configuration nodes for APQ8084 and MSM8974. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/qcom-apq8084.dtsi16
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi16
2 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi
index 1f130bc16858..dbedf64f6564 100644
--- a/arch/arm/boot/dts/qcom-apq8084.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8084.dtsi
@@ -226,5 +226,21 @@
clock-names = "core", "iface";
status = "disabled";
};
+
+ spmi_bus: spmi@fc4cf000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg-names = "core", "intr", "cnfg";
+ reg = <0xfc4cf000 0x1000>,
+ <0xfc4cb000 0x1000>,
+ <0xfc4ca000 0x1000>;
+ interrupt-names = "periph_irq";
+ interrupts = <0 190 0>;
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ };
};
};
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e265ec16a787..2d11641c720f 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -247,5 +247,21 @@
#address-cells = <1>;
#size-cells = <0>;
};
+
+ spmi_bus: spmi@fc4cf000 {
+ compatible = "qcom,spmi-pmic-arb";
+ reg-names = "core", "intr", "cnfg";
+ reg = <0xfc4cf000 0x1000>,
+ <0xfc4cb000 0x1000>,
+ <0xfc4ca000 0x1000>;
+ interrupt-names = "periph_irq";
+ interrupts = <0 190 0>;
+ qcom,ee = <0>;
+ qcom,channel = <0>;
+ #address-cells = <2>;
+ #size-cells = <0>;
+ interrupt-controller;
+ #interrupt-cells = <4>;
+ };
};
};
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