summaryrefslogtreecommitdiffstats
path: root/arch/arm64/boot
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2018-01-05 11:44:20 +0100
committerArnd Bergmann <arnd@arndb.de>2018-01-05 11:44:20 +0100
commit5375ef7d1c343973d5a7fe7fff27e6386a7f68af (patch)
tree54e7403b2f04b5cdea49263e3812ec9a104af5d2 /arch/arm64/boot
parent586b2a4befad88cd87b372a1cea01e58c6811ea9 (diff)
parent342a2922acb0f1be6b5e937427545f04c9d0a7ee (diff)
downloadtalos-obmc-linux-5375ef7d1c343973d5a7fe7fff27e6386a7f68af.tar.gz
talos-obmc-linux-5375ef7d1c343973d5a7fe7fff27e6386a7f68af.zip
Merge tag 'qcom-arm64-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt
Pull "Qualcomm ARM64 Updates for v4.16" from Andy Gross: * Assorted cleanups for msm8916 * Fix IPC references for smsm * tag 'qcom-arm64-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: arm64: dts: qcom: msm8916-pins: keep cdc_dmic pins in suspend mode arm64: dts: qcom: msm8916-pins: move sdhc2 cd node with its siblings arm64: dts: qcom: msm8916: normalize I2C and SPI nodes arm64: dts: qcom: msm8916: drop unused board-specific nodes arm64: dts: qcom: msm8916-pins: remove assignments to bias-disable arm64: dts: qcom: pm8916: fix wcd_codec indentation arm64: dts: msm8916: Correct ipc references for smsm arm64: dts: msm8916: Add missing #phy-cells
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916-pins.dtsi88
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi29
-rw-r--r--arch/arm64/boot/dts/qcom/pm8916.dtsi82
3 files changed, 77 insertions, 122 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
index 4cb0b5834143..390a2fa28514 100644
--- a/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
@@ -278,7 +278,7 @@
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -290,7 +290,7 @@
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -302,7 +302,7 @@
pinconf {
pins = "gpio14", "gpio15";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -314,7 +314,7 @@
pinconf {
pins = "gpio14", "gpio15";
drive-strength = <2>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -326,7 +326,7 @@
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <16>;
- bias-disable = <0>;
+ bias-disable;
};
};
@@ -338,32 +338,7 @@
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
- bias-disable = <0>;
- };
- };
-
- sdhc2_cd_pin {
- sdc2_cd_on: cd_on {
- pinmux {
- function = "gpio";
- pins = "gpio38";
- };
- pinconf {
- pins = "gpio38";
- drive-strength = <2>;
- bias-pull-up;
- };
- };
- sdc2_cd_off: cd_off {
- pinmux {
- function = "gpio";
- pins = "gpio38";
- };
- pinconf {
- pins = "gpio38";
- drive-strength = <2>;
- bias-disable;
- };
+ bias-disable;
};
};
@@ -505,26 +480,25 @@
};
};
- ext-codec-lines {
- ext_codec_lines_act: lines_on {
+ pmx_sdc2_cd_pin {
+ sdc2_cd_on: cd_on {
pinmux {
function = "gpio";
- pins = "gpio67";
+ pins = "gpio38";
};
pinconf {
- pins = "gpio67";
- drive-strength = <8>;
- bias-disable;
- output-high;
+ pins = "gpio38";
+ drive-strength = <2>;
+ bias-pull-up;
};
};
- ext_codec_lines_sus: lines_off {
+ sdc2_cd_off: cd_off {
pinmux {
function = "gpio";
- pins = "gpio67";
+ pins = "gpio38";
};
pinconf {
- pins = "gpio67";
+ pins = "gpio38";
drive-strength = <2>;
bias-disable;
};
@@ -687,34 +661,16 @@
};
};
cdc_dmic_lines_sus: dmic_lines_off {
- pinconf {
- pins = "gpio0", "gpio1";
- drive-strength = <2>;
- bias-disable;
- };
- };
- };
-
- cross-conn-det {
- cross_conn_det_act: lines_on {
- pinmux {
- function = "gpio";
- pins = "gpio120";
- };
- pinconf {
- pins = "gpio120";
- drive-strength = <8>;
- output-low;
- bias-pull-down;
+ pinmux_dmic0_clk {
+ function = "dmic0_clk";
+ pins = "gpio0";
};
- };
- cross_conn_det_sus: lines_off {
- pinmux {
- function = "gpio";
- pins = "gpio120";
+ pinmux_dmic0_data {
+ function = "dmic0_data";
+ pins = "gpio1";
};
pinconf {
- pins = "gpio120";
+ pins = "gpio0", "gpio1";
drive-strength = <2>;
bias-disable;
};
diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index 6b2127a6ced1..e51b04900726 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -355,7 +355,7 @@
blsp_spi1: spi@78b5000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b5000 0x600>;
+ reg = <0x078b5000 0x500>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -372,7 +372,7 @@
blsp_spi2: spi@78b6000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b6000 0x600>;
+ reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP2_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -389,7 +389,7 @@
blsp_spi3: spi@78b7000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b7000 0x600>;
+ reg = <0x078b7000 0x500>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP3_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -406,7 +406,7 @@
blsp_spi4: spi@78b8000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b8000 0x600>;
+ reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -423,7 +423,7 @@
blsp_spi5: spi@78b9000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078b9000 0x600>;
+ reg = <0x078b9000 0x500>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP5_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -440,7 +440,7 @@
blsp_spi6: spi@78ba000 {
compatible = "qcom,spi-qup-v2.2.1";
- reg = <0x078ba000 0x600>;
+ reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_BLSP1_QUP6_SPI_APPS_CLK>,
<&gcc GCC_BLSP1_AHB_CLK>;
@@ -457,10 +457,10 @@
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b6000 0x1000>;
+ reg = <0x078b6000 0x500>;
interrupts = <GIC_SPI 96 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
@@ -472,10 +472,10 @@
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78b8000 0x1000>;
+ reg = <0x078b8000 0x500>;
interrupts = <GIC_SPI 98 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c4_default>;
@@ -487,10 +487,10 @@
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
- reg = <0x78ba000 0x1000>;
+ reg = <0x078ba000 0x500>;
interrupts = <GIC_SPI 100 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
- <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
+ <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c6_default>;
@@ -906,6 +906,7 @@
"dsi_phy_regulator";
#clock-cells = <1>;
+ #phy-cells = <0>;
clocks = <&gcc GCC_MDSS_AHB_CLK>;
clock-names = "iface_clk";
@@ -1435,8 +1436,8 @@
#address-cells = <1>;
#size-cells = <0>;
- qcom,ipc-1 = <&apcs 0 13>;
- qcom,ipc-6 = <&apcs 0 19>;
+ qcom,ipc-1 = <&apcs 8 13>;
+ qcom,ipc-3 = <&apcs 8 19>;
apps_smsm: apps@0 {
reg = <0>;
diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi
index 0223e60d8b6a..196b1c0ceb9b 100644
--- a/arch/arm64/boot/dts/qcom/pm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi
@@ -97,47 +97,45 @@
#address-cells = <1>;
#size-cells = <0>;
- wcd_codec: codec@f000 {
- compatible = "qcom,pm8916-wcd-analog-codec";
- reg = <0xf000 0x200>;
- reg-names = "pmic-codec-core";
- clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
- clock-names = "mclk";
- interrupt-parent = <&spmi_bus>;
- interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
- <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
- <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
- interrupt-names = "cdc_spk_cnp_int",
- "cdc_spk_clip_int",
- "cdc_spk_ocp_int",
- "mbhc_ins_rem_det1",
- "mbhc_but_rel_det",
- "mbhc_but_press_det",
- "mbhc_ins_rem_det",
- "mbhc_switch_int",
- "cdc_ear_ocp_int",
- "cdc_hphr_ocp_int",
- "cdc_hphl_ocp_det",
- "cdc_ear_cnp_int",
- "cdc_hphr_cnp_int",
- "cdc_hphl_cnp_int";
- vdd-cdc-io-supply = <&pm8916_l5>;
- vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
- vdd-micbias-supply = <&pm8916_l13>;
- #sound-dai-cells = <1>;
-
- };
-
+ wcd_codec: codec@f000 {
+ compatible = "qcom,pm8916-wcd-analog-codec";
+ reg = <0xf000 0x200>;
+ reg-names = "pmic-codec-core";
+ clocks = <&gcc GCC_CODEC_DIGCODEC_CLK>;
+ clock-names = "mclk";
+ interrupt-parent = <&spmi_bus>;
+ interrupts = <0x1 0xf0 0x0 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x1 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x2 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x3 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x4 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x5 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x6 IRQ_TYPE_NONE>,
+ <0x1 0xf0 0x7 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x0 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x1 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x2 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x3 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x4 IRQ_TYPE_NONE>,
+ <0x1 0xf1 0x5 IRQ_TYPE_NONE>;
+ interrupt-names = "cdc_spk_cnp_int",
+ "cdc_spk_clip_int",
+ "cdc_spk_ocp_int",
+ "mbhc_ins_rem_det1",
+ "mbhc_but_rel_det",
+ "mbhc_but_press_det",
+ "mbhc_ins_rem_det",
+ "mbhc_switch_int",
+ "cdc_ear_ocp_int",
+ "cdc_hphr_ocp_int",
+ "cdc_hphl_ocp_det",
+ "cdc_ear_cnp_int",
+ "cdc_hphr_cnp_int",
+ "cdc_hphl_cnp_int";
+ vdd-cdc-io-supply = <&pm8916_l5>;
+ vdd-cdc-tx-rx-cx-supply = <&pm8916_l5>;
+ vdd-micbias-supply = <&pm8916_l13>;
+ #sound-dai-cells = <1>;
+ };
};
};
OpenPOWER on IntegriCloud