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authorRob Herring <robh@kernel.org>2017-10-13 12:54:52 -0500
committerArnd Bergmann <arnd@arndb.de>2017-10-20 00:37:56 +0200
commitd8bcaabee40521b33af8ab9b44b5df56eb4cd929 (patch)
tree7a8fe0e7bb0d2b5132b18d5e943523dfdf1ce548 /arch/arm64/boot/dts/arm/foundation-v8.dtsi
parent8dccafaa281aa1d240a58bbcdff338aec114a021 (diff)
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arm64: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using the following command: perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm64/boot/dts -type -f -name '*.dts*' Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/boot/dts/arm/foundation-v8.dtsi')
-rw-r--r--arch/arm64/boot/dts/arm/foundation-v8.dtsi14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dtsi b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
index 8ecdd4331980..21a7a575f02c 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dtsi
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dtsi
@@ -97,7 +97,7 @@
timeout-sec = <30>;
};
- smb@08000000 {
+ smb@8000000 {
compatible = "arm,vexpress,v2m-p1", "simple-bus";
arm,v2m-memory-map = "rs1";
#address-cells = <2>; /* SMB chipselect number and offset */
@@ -189,12 +189,12 @@
#size-cells = <1>;
ranges = <0 3 0 0x200000>;
- v2m_sysreg: sysreg@010000 {
+ v2m_sysreg: sysreg@10000 {
compatible = "arm,vexpress-sysreg";
reg = <0x010000 0x1000>;
};
- v2m_serial0: uart@090000 {
+ v2m_serial0: uart@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@@ -202,7 +202,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial1: uart@0a0000 {
+ v2m_serial1: uart@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@@ -210,7 +210,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial2: uart@0b0000 {
+ v2m_serial2: uart@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@@ -218,7 +218,7 @@
clock-names = "uartclk", "apb_pclk";
};
- v2m_serial3: uart@0c0000 {
+ v2m_serial3: uart@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;
@@ -226,7 +226,7 @@
clock-names = "uartclk", "apb_pclk";
};
- virtio-block@0130000 {
+ virtio-block@130000 {
compatible = "virtio,mmio";
reg = <0x130000 0x200>;
interrupts = <42>;
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