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author | Sudeep Holla <sudeep.holla@arm.com> | 2015-05-18 16:29:04 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2015-06-02 09:58:18 +0100 |
commit | 1e5f0519f4cbf8b8830b88039e16222f186a4ab4 (patch) | |
tree | ede7f2181a15db8c88cd713dfaeeea69aeb338b2 /arch/arm/mach-realview | |
parent | 73c430bf9ac6cd3a41ccc3c9904e66cc0a5f9420 (diff) | |
download | talos-obmc-linux-1e5f0519f4cbf8b8830b88039e16222f186a4ab4.tar.gz talos-obmc-linux-1e5f0519f4cbf8b8830b88039e16222f186a4ab4.zip |
ARM: 8365/1: introduce sp804_timer_disable and remove arm_timer.h inclusion
The header asm/hardware/arm_timer.h is included in various machine
specific files to access TIMER_CTRL and initialise to a known state.
This patch introduces a new function sp804_timer_disable to disable
the SP804 timers and uses the same for initialising the timers to
known(off) state, thereby removing the dependency on the header
asm/hardware/arm_timer.h
This change is in prepartion to move sp804 timer support out of arch/arm
so that it can be used on ARM64 platforms.
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Olof Johansson <olof@lixom.net>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview')
-rw-r--r-- | arch/arm/mach-realview/core.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c index c309593abdb2..c611f489bdd2 100644 --- a/arch/arm/mach-realview/core.c +++ b/arch/arm/mach-realview/core.c @@ -38,7 +38,6 @@ #include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/hardware/arm_timer.h> #include <asm/hardware/icst.h> #include <asm/mach/arch.h> @@ -381,10 +380,10 @@ void __init realview_timer_init(unsigned int timer_irq) /* * Initialise to a known state (all timers off) */ - writel(0, timer0_va_base + TIMER_CTRL); - writel(0, timer1_va_base + TIMER_CTRL); - writel(0, timer2_va_base + TIMER_CTRL); - writel(0, timer3_va_base + TIMER_CTRL); + sp804_timer_disable(timer0_va_base); + sp804_timer_disable(timer1_va_base); + sp804_timer_disable(timer2_va_base); + sp804_timer_disable(timer3_va_base); sp804_clocksource_init(timer3_va_base, "timer3"); sp804_clockevents_init(timer0_va_base, timer_irq, "timer0"); |