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authorIgor Grinberg <grinberg@compulab.co.il>2013-01-13 13:49:47 +0200
committerHaojian Zhuang <haojian.zhuang@linaro.org>2013-01-23 16:56:32 +0800
commitd107a204154ddd79339203c2deeb7433f0cf6777 (patch)
tree84931e8d1797c48edbc3e17cd4b76d7fae80d100 /arch/arm/mach-orion5x/common.c
parent6a639bb83b751bfed61be13c0e3df17e5a970a94 (diff)
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ARM: PXA3xx: program the CSMSADRCFG register
The Chip Select Configuration Register must be programmed to 0x2 in order to achieve the correct behavior of the Static Memory Controller. Without this patch devices wired to DFI and accessed through SMC cannot be accessed after resume from S2. Do not rely on the boot loader to program the CSMSADRCFG register by programming it in the kernel smemc module. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Cc: stable@vger.kernel.org Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Diffstat (limited to 'arch/arm/mach-orion5x/common.c')
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