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authorSudeep Holla <sudeep.holla@arm.com>2015-01-08 10:42:34 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2015-01-15 11:55:07 +0000
commit5d425c18653731af62831d30a4fa023d532657a9 (patch)
tree0dff152cf14260f272bf30d8d28269c10935e90f /arch/arm/mach-nomadik
parent26a945caf381225c9a1e68f14826a884c08ea9cb (diff)
downloadtalos-obmc-linux-5d425c18653731af62831d30a4fa023d532657a9.tar.gz
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arm64: kernel: add support for cpu cache information
This patch adds support for cacheinfo on ARM64. On ARMv8, the cache hierarchy can be identified through Cache Level ID (CLIDR) register while the cache geometry is provided by Cache Size ID (CCSIDR) register. Since the architecture doesn't provide any way of detecting the cpus sharing particular cache, device tree is used for the same purpose. Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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