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authorShawn Guo <shawn.guo@linaro.org>2013-10-09 15:54:31 +0800
committerShawn Guo <shawn.guo@linaro.org>2013-10-21 09:37:32 +0800
commit6050d181a4fd4abb745506a6e565d55f1f9df964 (patch)
tree0b51b0b269ebb9438eaf00d6b02a12b0c27448cf /arch/arm/mach-imx
parentfcd75f921dfa21a745869090c512ce4c6f2f0477 (diff)
downloadtalos-obmc-linux-6050d181a4fd4abb745506a6e565d55f1f9df964.tar.gz
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ARM: imx: reset core along with enable/disable operation
From hotplug stress test result, resetting core during enable/disable operation can improve cpu hotplug stability. So let's set SRC reset bit in imx_enable_cpu() for the core when its enable bit is accessed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/src.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c
index 10a6b1a8c5ac..4754373e7e7d 100644
--- a/arch/arm/mach-imx/src.c
+++ b/arch/arm/mach-imx/src.c
@@ -91,6 +91,7 @@ void imx_enable_cpu(int cpu, bool enable)
spin_lock(&scr_lock);
val = readl_relaxed(src_base + SRC_SCR);
val = enable ? val | mask : val & ~mask;
+ val |= 1 << (BP_SRC_SCR_CORE1_RST + cpu - 1);
writel_relaxed(val, src_base + SRC_SCR);
spin_unlock(&scr_lock);
}
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