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| author | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-11-23 19:42:09 -0200 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2011-11-23 19:42:09 -0200 |
| commit | 12cbfd0a3c52a52c2948c91b9e62e73c468d1572 (patch) | |
| tree | 9252b3929159a83fc81ca0a48706bfa959660967 /arch/arm/mach-imx/clock-imx25.c | |
| parent | b32e724308300a6ecead0f4895f0452a06a4291d (diff) | |
| parent | cfcfc9eca2bcbd26a8e206baeb005b055dbf8e37 (diff) | |
| download | talos-obmc-linux-12cbfd0a3c52a52c2948c91b9e62e73c468d1572.tar.gz talos-obmc-linux-12cbfd0a3c52a52c2948c91b9e62e73c468d1572.zip | |
Merge tag 'v3.2-rc2' into staging/for_v3.3
* tag 'v3.2-rc2': (3068 commits)
Linux 3.2-rc2
hfs: add sanity check for file name length
fsl-rio: fix compile error
blackfin: Fixup export.h includes
Blackfin: add serial TX IRQ in individual platform resource
virtio-pci: fix use after free
ACPI / cpuidle: Remove acpi_idle_suspend (to fix suspend regression)
drm/radeon/kms/combios: fix dynamic allocation of PM clock modes
[CPUFREQ] db8500: fix build error due to undeclared i variable
bma023: Add SFI translation for this device
vrtc: change its year offset from 1960 to 1972
ce4100: fix a build error
arm/imx: fix imx6q mmc error when mounting rootfs
arm/imx: fix AUTO_ZRELADDR selection
arm/imx: fix the references to ARCH_MX3
ARM: mx51/53: set pwm clock parent to ipg_perclk
btrfs: rename the option to nospace_cache
drm/radeon/kms/pm: switch to dynamically allocating clock mode array
drm/radeon/kms: optimize r600_pm_profile_init
drm/radeon/kms/pm: add a proper pm profile init function for fusion
...
Conflicts:
drivers/media/radio/Kconfig
Diffstat (limited to 'arch/arm/mach-imx/clock-imx25.c')
| -rw-r--r-- | arch/arm/mach-imx/clock-imx25.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c index e63e23504fe5..b0fec74c8c91 100644 --- a/arch/arm/mach-imx/clock-imx25.c +++ b/arch/arm/mach-imx/clock-imx25.c @@ -263,6 +263,7 @@ DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL); +DEFINE_CLOCK(iim_clk, 0, CCM_CGCR1, 26, NULL, NULL, NULL); #define _REGISTER_CLOCK(d, n, c) \ { \ @@ -310,6 +311,7 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) /* i.mx25 has the i.mx35 type sdma */ _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk) + _REGISTER_CLOCK(NULL, "iim", iim_clk) }; int __init mx25_clocks_init(void) @@ -334,6 +336,10 @@ int __init mx25_clocks_init(void) /* Clock source for gpt is ahb_div */ __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64); + clk_enable(&iim_clk); + imx_print_silicon_rev("i.MX25", mx25_revision()); + clk_disable(&iim_clk); + mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); return 0; |
