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author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-12 12:32:43 +0900 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-10-12 12:32:43 +0900 |
commit | 5cea24c5899a81abf59706d69580dd5c734effa8 (patch) | |
tree | c080ec6b1c6cf27b50f00b2980068fb563b6f7ec /arch/arm/kernel/smp.c | |
parent | 2fc07efa2241afe08de136c061b3baa103fb286c (diff) | |
parent | a0f0dd57f4a85310d9936f1770a0424b49fef876 (diff) | |
download | talos-obmc-linux-5cea24c5899a81abf59706d69580dd5c734effa8.tar.gz talos-obmc-linux-5cea24c5899a81abf59706d69580dd5c734effa8.zip |
Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull second set of ARM updates from Russell King:
"This is the second set of ARM updates for this merge window.
Contained within are changes to allow the kernel to boot in hypervisor
mode on CPUs supporting virtualization, and cache flushing support to
the point of inner sharable unification, which are used by the
suspend/resume code to avoid having to do a full cache flush.
Also included is one fix for VFP code identified by Michael Olbrich."
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm:
ARM: vfp: fix saving d16-d31 vfp registers on v6+ kernels
ARM: 7549/1: HYP: fix boot on some ARM1136 cores
ARM: 7542/1: mm: fix cache LoUIS API for xscale and feroceon
ARM: mm: update __v7_setup() to the new LoUIS cache maintenance API
ARM: kernel: update __cpu_disable to use cache LoUIS maintenance API
ARM: kernel: update cpu_suspend code to use cache LoUIS operations
ARM: mm: rename jump labels in v7_flush_dcache_all function
ARM: mm: implement LoUIS API for cache maintenance ops
ARM: virt: arch_timers: enable access to physical timers
ARM: virt: Add CONFIG_ARM_VIRT_EXT option
ARM: virt: Add boot-time diagnostics
ARM: virt: Update documentation for hyp mode entry support
ARM: zImage/virt: hyp mode entry support for the zImage loader
ARM: virt: allow the kernel to be entered in HYP mode
ARM: opcodes: add __ERET/__MSR_ELR_HYP instruction encoding
Diffstat (limited to 'arch/arm/kernel/smp.c')
-rw-r--r-- | arch/arm/kernel/smp.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index d100eacdb798..8e20754dd31d 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -43,6 +43,7 @@ #include <asm/ptrace.h> #include <asm/localtimer.h> #include <asm/smp_plat.h> +#include <asm/virt.h> #include <asm/mach/arch.h> /* @@ -202,8 +203,11 @@ int __cpuinit __cpu_disable(void) /* * Flush user cache and TLB mappings, and then remove this CPU * from the vm mask set of all processes. + * + * Caches are flushed to the Level of Unification Inner Shareable + * to write-back dirty lines to unified caches shared by all CPUs. */ - flush_cache_all(); + flush_cache_louis(); local_flush_tlb_all(); clear_tasks_mm_cpumask(cpu); @@ -355,6 +359,8 @@ void __init smp_cpus_done(unsigned int max_cpus) num_online_cpus(), bogosum / (500000/HZ), (bogosum / (5000/HZ)) % 100); + + hyp_mode_check(); } void __init smp_prepare_boot_cpu(void) |