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author | Nathan Lynch <nathan_lynch@mentor.com> | 2014-09-11 02:49:08 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-09-16 16:09:32 +0100 |
commit | fbfb872f5f417cea48760c535e0ff027c88b507a (patch) | |
tree | 269d5a514efd78c857e5d044860e5bcc6de3644c /arch/arm/kernel/psci_smp.c | |
parent | 7a0bd49713aca3040099e1413d1cc9f08802d97a (diff) | |
download | talos-obmc-linux-fbfb872f5f417cea48760c535e0ff027c88b507a.tar.gz talos-obmc-linux-fbfb872f5f417cea48760c535e0ff027c88b507a.zip |
ARM: 8148/1: flush TLS and thumbee register state during exec
The TPIDRURO and TPIDRURW registers need to be flushed during exec;
otherwise TLS information is potentially leaked. TPIDRURO in
particular needs careful treatment. Since flush_thread basically
needs the same code used to set the TLS in arm_syscall, pull that into
a common set_tls helper in tls.h and use it in both places.
Similarly, TEEHBR needs to be cleared during exec as well. Clearing
its save slot in thread_info isn't right as there is no guarantee
that a thread switch will occur before the new program runs. Just
setting the register directly is sufficient.
Signed-off-by: Nathan Lynch <nathan_lynch@mentor.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/psci_smp.c')
0 files changed, 0 insertions, 0 deletions