diff options
| author | Nishanth Menon <nm@ti.com> | 2014-01-29 12:19:17 -0600 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2014-02-28 15:04:28 -0800 |
| commit | 8d766fa29f7d217afffc9f3b3fc7c45696ef9896 (patch) | |
| tree | 51b60bd3ff69844ce1d500cf0849092953d895b5 /arch/arm/boot/dts | |
| parent | 26f3ff8713135d06b6edf11207274d5c0bb5782d (diff) | |
| download | talos-obmc-linux-8d766fa29f7d217afffc9f3b3fc7c45696ef9896.tar.gz talos-obmc-linux-8d766fa29f7d217afffc9f3b3fc7c45696ef9896.zip | |
ARM: dts: OMAP3+: add clock nodes for CPU
OMAP34xx, AM3517 and OMAP36xx platforms use dpll1 clock.
OMAP443x, OMAP446x, OMAP447x, OMAP5, DRA7, AM43xx platforms use
dpll_mpu clock.
Latency used is the generic latency defined in omap-cpufreq
driver.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts')
| -rw-r--r-- | arch/arm/boot/dts/am33xx.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/dra7.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap3.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 6 |
6 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 3b605411ba05..d0ecefd75cc2 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -58,6 +58,10 @@ 275000 1125000 >; voltage-tolerance = <2>; /* 2 percentage */ + + clocks = <&dpll_mpu_ck>; + clock-names = "cpu"; + clock-latency = <300000>; /* From omap-cpufreq driver */ }; }; diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index bcf77a870e67..eb74ab82aa94 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -33,6 +33,11 @@ compatible = "arm,cortex-a9"; device_type = "cpu"; reg = <0>; + + clocks = <&dpll_mpu_ck>; + clock-names = "cpu"; + + clock-latency = <300000>; /* From omap-cpufreq driver */ }; }; diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index bff4348f48fa..17f3b5adb7c2 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -47,6 +47,11 @@ 1000000 1060000 1176000 1160000 >; + + clocks = <&dpll_mpu_ck>; + clock-names = "cpu"; + + clock-latency = <300000>; /* From omap-cpufreq driver */ }; cpu@1 { device_type = "cpu"; diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 1019b628f080..d3924198e5fd 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -35,6 +35,11 @@ compatible = "arm,cortex-a8"; device_type = "cpu"; reg = <0x0>; + + clocks = <&dpll1_ck>; + clock-names = "cpu"; + + clock-latency = <300000>; /* From omap-cpufreq driver */ }; }; diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index fd27392866d9..890223780620 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -36,6 +36,11 @@ device_type = "cpu"; next-level-cache = <&L2>; reg = <0x0>; + + clocks = <&dpll_mpu_ck>; + clock-names = "cpu"; + + clock-latency = <300000>; /* From omap-cpufreq driver */ }; cpu@1 { compatible = "arm,cortex-a9"; diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 9ba5c1877172..f15c31cebc27 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -49,6 +49,12 @@ 1000000 1060000 1500000 1250000 >; + + clocks = <&dpll_mpu_ck>; + clock-names = "cpu"; + + clock-latency = <300000>; /* From omap-cpufreq driver */ + /* cooling options */ cooling-min-level = <0>; cooling-max-level = <2>; |
