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| author | Thierry Reding <thierry.reding@avionic-design.de> | 2012-09-20 10:39:20 +0200 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-11-16 09:14:40 -0700 |
| commit | dced3e3ee5833109c04ecf8687ae44960c65ca73 (patch) | |
| tree | 1160d8ec895cb8b6a83cdeb1a5cf3c5cde392167 /arch/arm/boot/dts/tegra20-trimslice.dts | |
| parent | 20ffbd7d6b357ee2f8a607c63805fb2c1f78effb (diff) | |
| download | talos-obmc-linux-dced3e3ee5833109c04ecf8687ae44960c65ca73.tar.gz talos-obmc-linux-dced3e3ee5833109c04ecf8687ae44960c65ca73.zip | |
ARM: tegra: trimslice: enable HDMI port
Enable host1x, and the HDMI output. Harmony also has a DVI port with an
HDMI form-factor connector, driven by Tegra's LVDS output. This isn't
enabled yet, due to potential issues with having multiple outputs enabled.
Correct DDC I2C frequency to 100KHz.
Add dummy/fixed regulators to satisfy the HDMI driver.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
[swarren: add commit description, remove enable of DVI port]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-trimslice.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra20-trimslice.dts | 44 |
1 files changed, 40 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index f4e0428eb737..b70b4cb754c8 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -10,6 +10,18 @@ reg = <0x00000000 0x40000000>; }; + host1x { + hdmi { + status = "okay"; + + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&hdmi_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + pinmux { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -249,9 +261,9 @@ clock-frequency = <216000000>; }; - i2c@7000c000 { + dvi_ddc: i2c@7000c000 { status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; }; spi@7000c380 { @@ -264,9 +276,9 @@ }; }; - i2c@7000c400 { + hdmi_ddc: i2c@7000c400 { status = "okay"; - clock-frequency = <400000>; + clock-frequency = <100000>; }; i2c@7000c500 { @@ -310,6 +322,30 @@ bus-width = <4>; }; + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + hdmi_vdd_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "avdd_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + hdmi_pll_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "avdd_hdmi_pll"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + }; + sound { compatible = "nvidia,tegra-audio-trimslice"; nvidia,i2s-controller = <&tegra_i2s1>; |
