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| author | Chen-Yu Tsai <wens@csie.org> | 2017-05-19 15:06:10 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-05-19 10:30:55 +0200 |
| commit | 1a8c176b2f15b879746b85b4c0d585f2016b65e3 (patch) | |
| tree | 8c30f7e548b1ad0505de5746bd303be8683c0ad0 /arch/arm/boot/dts/sun8i-a83t.dtsi | |
| parent | d050971c42b0df9056114086ce835a8db0074b84 (diff) | |
| download | talos-obmc-linux-1a8c176b2f15b879746b85b4c0d585f2016b65e3.tar.gz talos-obmc-linux-1a8c176b2f15b879746b85b4c0d585f2016b65e3.zip | |
ARM: sun8i: a83t: Add CCU device nodes
Now that we have support for the A83T CCU, add a device node for it,
and replace any existing placeholder clock phandles with the correct
ones.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a83t.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a83t.dtsi | 15 |
1 files changed, 13 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index c0a1e4f74b89..c9a5d07b2ada 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -162,13 +162,23 @@ #size-cells = <1>; ranges; + ccu: clock@1c20000 { + compatible = "allwinner,sun8i-a83t-ccu"; + reg = <0x01c20000 0x400>; + clocks = <&osc24M>, <&osc16Md512>; + clock-names = "hosc", "losc"; + #clock-cells = <1>; + #reset-cells = <1>; + }; + pio: pinctrl@1c20800 { compatible = "allwinner,sun8i-a83t-pinctrl"; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; reg = <0x01c20800 0x400>; - clocks = <&osc24M>; + clocks = <&ccu 45>, <&osc24M>, <&osc16Md512>; + clock-names = "apb", "hosc", "losc"; gpio-controller; interrupt-controller; #interrupt-cells = <3>; @@ -214,7 +224,8 @@ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; reg-shift = <2>; reg-io-width = <4>; - clocks = <&osc24M>; + clocks = <&ccu 53>; + resets = <&ccu 40>; status = "disabled"; }; |
