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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2015-02-17 15:52:39 +0100 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2015-02-24 08:22:48 +0900 |
commit | 30225743852ed5c3e732d7debe6c1f473c807d62 (patch) | |
tree | cd0bedd08dcdc49eabec4d39d6488b6517304cf0 /arch/arm/boot/dts/sh73a0.dtsi | |
parent | 7a91cc14f3ff6c70855d25fe7b7c0592ab023050 (diff) | |
download | talos-obmc-linux-30225743852ed5c3e732d7debe6c1f473c807d62.tar.gz talos-obmc-linux-30225743852ed5c3e732d7debe6c1f473c807d62.zip |
ARM: shmobile: sh73a0 dtsi: Add Cortex-A9 TWD node
Add a node for the Private Timer and Watchdog, as found in the Cortex-A9
MPCore.
Without this, there's no clocksource available during early kernel
initialization, before cmt1 is initialized, leading to a lock-up if
CONFIG_CPU_IDLE=y.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/sh73a0.dtsi')
-rw-r--r-- | arch/arm/boot/dts/sh73a0.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 70b694f09fd5..0b933e254d19 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -11,6 +11,7 @@ /include/ "skeleton.dtsi" #include <dt-bindings/clock/sh73a0-clock.h> +#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> / { @@ -35,6 +36,13 @@ }; }; + timer@f0000600 { + compatible = "arm,cortex-a9-twd-timer"; + reg = <0xf0000600 0x20>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; + clocks = <&twd_clk>; + }; + gic: interrupt-controller@f0001000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; |