diff options
author | Murali Karicheri <m-karicheri2@ti.com> | 2014-02-24 11:05:07 -0500 |
---|---|---|
committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2014-02-26 10:06:56 -0500 |
commit | 209636b6784a1b6bd3968aebf03612467c33361c (patch) | |
tree | 69721c1865ed548a1739af5233ea1fb6c45f547e /arch/arm/boot/dts/k2e.dtsi | |
parent | fc1c72ebb43f7c7218c540d8c9b7dd3f64eee100 (diff) | |
download | talos-obmc-linux-209636b6784a1b6bd3968aebf03612467c33361c.tar.gz talos-obmc-linux-209636b6784a1b6bd3968aebf03612467c33361c.zip |
ARM: dts: keystone: add support for k2 Edison SoC and EVM
Keystone2 Edison (K2E) is a Quad Cortex A15 based SoC with
1 DSP. It has standard peripherals such as i2c, spi, uart, timer,
pcie, etc similar to k2hk, but without wireless hardwares. This
patch add support for k2 Edison SoC and EVM. This re-uses the common
keystone.dtsi to include common bindings across the various k2
devices.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/k2e.dtsi')
-rw-r--r-- | arch/arm/boot/dts/k2e.dtsi | 80 |
1 files changed, 80 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi new file mode 100644 index 000000000000..03d01909525b --- /dev/null +++ b/arch/arm/boot/dts/k2e.dtsi @@ -0,0 +1,80 @@ +/* + * Copyright 2013-2014 Texas Instruments, Inc. + * + * Keystone 2 Edison soc device tree + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + interrupt-parent = <&gic>; + + cpu@0 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <0>; + }; + + cpu@1 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <1>; + }; + + cpu@2 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <2>; + }; + + cpu@3 { + compatible = "arm,cortex-a15"; + device_type = "cpu"; + reg = <3>; + }; + }; + + soc { + /include/ "k2e-clocks.dtsi" + + usb: usb@2680000 { + interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; + dwc3@2690000 { + interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; + }; + }; + + usb1_phy: usb_phy@2620750 { + compatible = "ti,keystone-usbphy"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x2620750 24>; + status = "disabled"; + }; + + usb1: usb@25000000 { + compatible = "ti,keystone-dwc3"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x25000000 0x10000>; + clocks = <&clkusb1>; + clock-names = "usb"; + interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; + ranges; + status = "disabled"; + + dwc3@25010000 { + compatible = "synopsys,dwc3"; + reg = <0x25010000 0x70000>; + interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; + usb-phy = <&usb1_phy>, <&usb1_phy>; + }; + }; + }; +}; |