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author | Greentime Hu <greentime@andestech.com> | 2017-10-25 15:52:31 +0800 |
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committer | Greentime Hu <greentime@andestech.com> | 2018-02-22 10:44:35 +0800 |
commit | 939c09ca7db29ef2aed3db49be41cb519eb4a55c (patch) | |
tree | 8fe6fcfb74898583c48fb29ca1486979d718ba07 /Documentation | |
parent | 8fda152e3d28fcc5c537fe1d1b88820ff2e5b0cd (diff) | |
download | talos-obmc-linux-939c09ca7db29ef2aed3db49be41cb519eb4a55c.tar.gz talos-obmc-linux-939c09ca7db29ef2aed3db49be41cb519eb4a55c.zip |
dt-bindings: nds32 CPU Bindings
This patch adds nds32 CPU binding documents.
Signed-off-by: Vincent Chen <vincentc@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Zong Li <zong@andestech.com>
Signed-off-by: Greentime Hu <greentime@andestech.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/nds32/cpus.txt | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt b/Documentation/devicetree/bindings/nds32/cpus.txt new file mode 100644 index 000000000000..6f9e311b6589 --- /dev/null +++ b/Documentation/devicetree/bindings/nds32/cpus.txt @@ -0,0 +1,38 @@ +* Andestech Processor Binding + +This binding specifies what properties must be available in the device tree +representation of a Andestech Processor Core, which is the root node in the +tree. + +Required properties: + + - compatible: + Usage: required + Value type: <string> + Definition: Should be "andestech,<core_name>", "andestech,nds32v3" as fallback. + Must contain "andestech,nds32v3" as the most generic value, in addition to + one of the following identifiers for a particular CPU core: + "andestech,n13" + "andestech,n15" + "andestech,d15" + "andestech,n10" + "andestech,d10" + - device_type + Usage: required + Value type: <string> + Definition: must be "cpu" + - reg: Contains CPU index. + - clock-frequency: Contains the clock frequency for CPU, in Hz. + +* Examples + +/ { + cpus { + cpu@0 { + device_type = "cpu"; + compatible = "andestech,n13", "andestech,nds32v3"; + reg = <0x0>; + clock-frequency = <60000000> + }; + }; +}; |