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authorMikko Perttunen <mperttunen@nvidia.com>2017-09-05 11:43:04 +0300
committerThierry Reding <treding@nvidia.com>2017-10-20 14:19:51 +0200
commitd3b3efa1705833aa1b7f55ea9b2ed09e48e957a7 (patch)
tree733670d57870e3bd7c33c9ec58492470c98e2e97 /Documentation/devicetree/bindings/display/tegra
parent617dd7cc490b72345277e2666c8ed34d4f47f0da (diff)
downloadtalos-obmc-linux-d3b3efa1705833aa1b7f55ea9b2ed09e48e957a7.tar.gz
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dt-bindings: host1x: Add Tegra186 information
Add the Tegra186-specific hypervisor-related register range properties. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/display/tegra')
-rw-r--r--Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt4
1 files changed, 4 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
index 74e1e8add5a1..844e0103fb0d 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt
@@ -3,6 +3,10 @@ NVIDIA Tegra host1x
Required properties:
- compatible: "nvidia,tegra<chip>-host1x"
- reg: Physical base address and length of the controller's registers.
+ For pre-Tegra186, one entry describing the whole register area.
+ For Tegra186, one entry for each entry in reg-names:
+ "vm" - VM region assigned to Linux
+ "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
- interrupts: The interrupt outputs from the controller.
- #address-cells: The number of cells used to represent physical base addresses
in the host1x address space. Should be 1.
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