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author | Michael Turquette <mturquette@baylibre.com> | 2015-12-22 16:49:38 -0800 |
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committer | Michael Turquette <mturquette@baylibre.com> | 2015-12-22 16:49:38 -0800 |
commit | ce6dd266d535d66ac90abdd0241e7e5be4890568 (patch) | |
tree | 16f5d98d8fcc1559c449c5f8a850bf3d6613e6ff /Documentation/devicetree/bindings/clock | |
parent | 471a9abeb18f43cf437f58d3a13ed8f43b7dede7 (diff) | |
parent | 5e63dcc74b3066659ea53aeefbee1fc1d79f4b6f (diff) | |
download | talos-obmc-linux-ce6dd266d535d66ac90abdd0241e7e5be4890568.tar.gz talos-obmc-linux-ce6dd266d535d66ac90abdd0241e7e5be4890568.zip |
Merge branch 'clk-bcm2835' into clk-next
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r-- | Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt new file mode 100644 index 000000000000..7a837d2182ac --- /dev/null +++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt @@ -0,0 +1,31 @@ +Broadcom BCM2835 auxiliary peripheral support + +This binding uses the common clock binding: + Documentation/devicetree/bindings/clock/clock-bindings.txt + +The auxiliary peripherals (UART, SPI1, and SPI2) have a small register +area controlling clock gating to the peripherals, and providing an IRQ +status register. + +Required properties: +- compatible: Should be "brcm,bcm2835-aux" +- #clock-cells: Should be <1>. The permitted clock-specifier values can be + found in include/dt-bindings/clock/bcm2835-aux.h +- reg: Specifies base physical address and size of the registers +- clocks: The parent clock phandle + +Example: + + clocks: cprman@7e101000 { + compatible = "brcm,bcm2835-cprman"; + #clock-cells = <1>; + reg = <0x7e101000 0x2000>; + clocks = <&clk_osc>; + }; + + aux: aux@0x7e215004 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <1>; + reg = <0x7e215000 0x8>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + }; |