summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/clock
diff options
context:
space:
mode:
authorMarek Szyprowski <m.szyprowski@samsung.com>2017-08-21 10:05:03 +0200
committerMichael Turquette <mturquette@baylibre.com>2017-09-07 15:26:01 -0700
commitae432a9b314e07d486acfadc4df2f922721e6757 (patch)
tree9d428f2e1330ad0379b4d39dff18b7d4b1ed0fc9 /Documentation/devicetree/bindings/clock
parent232d7e4792f4c3f8ebb5e348a0795b6a71d0e7d8 (diff)
downloadtalos-obmc-linux-ae432a9b314e07d486acfadc4df2f922721e6757.tar.gz
talos-obmc-linux-ae432a9b314e07d486acfadc4df2f922721e6757.zip
clk: samsung: exynos-audss: Add support for runtime PM
This patch adds support for runtime PM to Exynos Audio SubSystem driver to enable full support for audio power domain on Exynos5 SoCs. The main change is moving register saving and restoring code from system sleep PM ops to runtime PM ops and implementing system sleep PM ops with generic pm_runtime_force_suspend/resume helpers. Runtime PM of the Exynos AudSS device is managed from clock core depending on the preparation status of the provided clocks. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/1503302703-13801-6-git-send-email-m.szyprowski@samsung.com
Diffstat (limited to 'Documentation/devicetree/bindings/clock')
-rw-r--r--Documentation/devicetree/bindings/clock/clk-exynos-audss.txt6
1 files changed, 6 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
index 0c3d6015868d..f3635d5aeba4 100644
--- a/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
+++ b/Documentation/devicetree/bindings/clock/clk-exynos-audss.txt
@@ -33,6 +33,12 @@ Required Properties:
- clock-names: Aliases for the above clocks. They should be "pll_ref",
"pll_in", "cdclk", "sclk_audio", and "sclk_pcm_in" respectively.
+Optional Properties:
+
+ - power-domains: a phandle to respective power domain node as described by
+ generic PM domain bindings (see power/power_domain.txt for more
+ information).
+
The following is the list of clocks generated by the controller. Each clock is
assigned an identifier and client nodes use this identifier to specify the
clock which they consume. Some of the clocks are available only on a particular
OpenPOWER on IntegriCloud