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| author | johnhcwang <hsienchiang@gmail.com> | 2016-07-21 06:01:10 -0500 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2016-07-22 14:01:13 +0930 |
| commit | b1342b2581181e4ec54b43edc5c4a18cef9b6a1d (patch) | |
| tree | 3fa2c87d4d665837a0156fc431edbe74f53b48d5 | |
| parent | 48be0c57f9c5f5c197fba129924709660a23a4a0 (diff) | |
| download | talos-obmc-linux-b1342b2581181e4ec54b43edc5c4a18cef9b6a1d.tar.gz talos-obmc-linux-b1342b2581181e4ec54b43edc5c4a18cef9b6a1d.zip | |
arm/aspeed: Fix the debounce setting on power buttonopenbmc-4.4-20160722-1
PCLK divider selection is decided by SCU08[25:23] and the value is 011b
on Barreleye.
That means PCLK should be H-PLL/8=384MHz/8=48MHz, but the current
debounce timer value was computed by 24MHz.
So the correct value should be 20ms*48000000/1000=EA600h
Signed-off-by: John Wang <hsienchiang@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rwxr-xr-x | arch/arm/mach-aspeed/aspeed.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c index 11d8a61b6ad6..fadbbb666e1d 100755 --- a/arch/arm/mach-aspeed/aspeed.c +++ b/arch/arm/mach-aspeed/aspeed.c @@ -159,9 +159,9 @@ static void __init do_barreleye_setup(void) writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x48)); writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x4C)); - /* Set debounce timer to 480000 cycles, with a pclk of 24MHz, + /* Set debounce timer to 480000 cycles, with a pclk of 48MHz, * corresponds to 20 ms. This time was found by experimentation */ - writel(0x00075300, AST_IO(AST_BASE_GPIO | 0x58)); + writel(0x000EA600, AST_IO(AST_BASE_GPIO | 0x58)); } static void __init do_palmetto_setup(void) |
