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path: root/src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml
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<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: src/usr/hwpf/hwp/nest_chiplets/proc_start_clocks_chiplets/proc_start_clocks_chiplets_errors.xml $ -->
<!--                                                                        -->
<!-- IBM CONFIDENTIAL                                                       -->
<!--                                                                        -->
<!-- COPYRIGHT International Business Machines Corp. 2012,2013              -->
<!--                                                                        -->
<!-- p1                                                                     -->
<!--                                                                        -->
<!-- Object Code Only (OCO) source materials                                -->
<!-- Licensed Internal Code Source Materials                                -->
<!-- IBM HostBoot Licensed Internal Code                                    -->
<!--                                                                        -->
<!-- The source code for this program is not published or otherwise         -->
<!-- divested of its trade secrets, irrespective of what has been           -->
<!-- deposited with the U.S. Copyright Office.                              -->
<!--                                                                        -->
<!-- Origin: 30                                                             -->
<!--                                                                        -->
<!-- IBM_PROLOG_END_TAG                                                     -->
<!-- $Id: proc_start_clocks_chiplets_errors.xml,v 1.4 2013/05/06 12:33:48 rkoester Exp $ -->
<!-- Error definitions for proc_start_clocks_chiplets procedure -->
<hwpErrors>
  <!-- *********************************************************************** -->
  <hwpError>
    <rc>RC_PROC_START_CLOCKS_XBUS_CHIPLET_CLK_STATUS_ERR</rc>
    <description>Unexpected XBUS clock status register returned after clock start operation.</description>
    <ffdc>STATUS_REG</ffdc>
    <ffdc>EXPECTED_REG</ffdc>
  </hwpError>
  <!-- *********************************************************************** -->
  <hwpError>
    <rc>RC_PROC_START_CLOCKS_ABUS_CHIPLET_CLK_STATUS_ERR</rc>
    <description>Unexpected ABUS clock status register returned after clock start operation.</description>
    <ffdc>STATUS_REG</ffdc>
    <ffdc>EXPECTED_REG</ffdc>
  </hwpError>
  <!-- *********************************************************************** -->
  <hwpError>
    <rc>RC_PROC_START_CLOCKS_PCIE_CHIPLET_CLK_STATUS_ERR</rc>
    <description>Unexpected clock status register returned after clock start operation.</description>
    <ffdc>STATUS_REG</ffdc>
    <ffdc>EXPECTED_REG</ffdc>
    <callout>
     <target>CHIP_IN_ERROR</target>
     <priority>HIGH</priority>
    </callout>
    <deconfigure>
      <target>CHIP_IN_ERROR</target>
    </deconfigure>
    <gard>
      <target>CHIP_IN_ERROR</target>
    </gard>
  </hwpError>
  <!-- *********************************************************************** -->
  <hwpError>
    <rc>RC_PROC_START_CLOCKS_XBUS_CHIPLET_FIR_ERR</rc>
    <description>Unexpected chiplet FIR bit set after clock start operation.</description>
    <ffdc>FIR_REG</ffdc>
    <ffdc>FIR_EXP_REG</ffdc>
  </hwpError>
  <!-- *********************************************************************** -->
  <hwpError>
    <rc>RC_PROC_START_CLOCKS_ABUS_CHIPLET_FIR_ERR</rc>
    <description>Unexpected chiplet FIR bit set after clock start operation.</description>
    <ffdc>FIR_REG</ffdc>
    <ffdc>FIR_EXP_REG</ffdc>
  </hwpError>
  <!-- *********************************************************************** -->
  <hwpError>
    <rc>RC_PROC_START_CLOCKS_PCIE_CHIPLET_FIR_ERR</rc>
    <description>Unexpected chiplet FIR bit set after clock start operation.</description>
    <ffdc>FIR_REG</ffdc>
    <ffdc>FIR_EXP_REG</ffdc>
    <callout>
      <target>CHIP_IN_ERROR</target>
      <priority>HIGH</priority>
    </callout>
    <deconfigure>
      <target>CHIP_IN_ERROR</target>
    </deconfigure>
    <gard>
      <target>CHIP_IN_ERROR</target>
    </gard>
  </hwpError>
  <!-- *********************************************************************** -->
  <hwpError>
    <rc>RC_PROC_START_CLOCKS_CHIPLETS_PARTIAL_GOOD_ERR</rc>
    <description>Unexpected chiplet selection when reading the partial good vector.</description>
    <ffdc>CHIPLET_BASE_SCOM_ADDR</ffdc>
   <callout>
      <procedure>CODE</procedure>
      <priority>HIGH</priority>
      </callout>
  </hwpError>
</hwpErrors>
  <!-- *********************************************************************** -->
  <!-- TODO Callout all chiplets of a specified type on a chip: story 69794    -->
  <!-- TODO Callout the PCI refclock: story 69766                              -->
  <!-- *********************************************************************** -->
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