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#-- $Id: p8.xbus.custom.scom.initfile,v 1.3 2013/03/15 21:18:37 thomsen Exp $
#-- CHANGE HISTORY:
#--------------------------------------------------------------------------------
#-- Version:|Author: | Date: | Comment:
#-- --------|--------|--------|--------------------------------------------------
#-- 1.3 |jgrell |03/14/13|Added temporary masking of the GCR Buffer Parity Checkers in the GCR Master until the source of the error can be found. This ungates the lab.
#-- 1.2 |thomsen |02/13/13|Cleaned up and Added Commented-out Lane Power Ups
#-- | | |Temporarily mask the GCR Buffer Parity Checker until the source of the error can be found. This ungates the lab.
#-- 1.1 |thomsen |01/29/13|Created initial version
#-- --------|--------|--------|--------------------------------------------------
#--------------------------------------------------------------------------------
# End of revision history
#--------------------------------------------------------------------------------
#-- TARGETS:
#-- SYS. Chiplet target
#-- TGT1. Proc target
#-- TGT2. Connected Chiplet target
#-- TGT3. Connected Proc target
#--Master list of variables that can be used in this file is at:
#--<Attribute Definition Location>
SyntaxVersion = 1
#-- -----------------------------------------------------------------------------
#--******************************************************************************
#-- -----------------------------------------------------------------------------
#--
#-- Includes
#-- Note: Must include the path to the .define file.
#-- -----------------------------------------------------------------------------
#--******************************************************************************
#-- -----------------------------------------------------------------------------
include ei4.io.define
#-- -----------------------------------------------------------------------------
#--******************************************************************************
#-- -----------------------------------------------------------------------------
#--
#-- Defines
#--
#-- -----------------------------------------------------------------------------
#--******************************************************************************
#-- -----------------------------------------------------------------------------
define def_IS_HW = (SYS.ATTR_IS_SIMULATION == 0);
define def_IS_VBU = (SYS.ATTR_IS_SIMULATION == 1);
define def_all_lanes=11111;
#--***********************************************************************************
#-------------------------------------------------------------------------------------
#-- Overrides
#-------------------------------------------------------------------------------------
#--***********************************************************************************
#--***********************************************************************************
#-------------------------------------------------------------------------------------
# __ ____ __ __
# / / ____ _____ ___ / __ \____ _ _____ _____ / / / /___
# / / / __ `/ __ \/ _ \ / /_/ / __ \ | /| / / _ \/ ___/ / / / / __ \
# / /___/ /_/ / / / / __/ / ____/ /_/ / |/ |/ / __/ / / /_/ / /_/ /
# /_____/\__,_/_/ /_/\___/ /_/ \____/|__/|__/\___/_/ \____/ .___/
# /_/
#-------------------------------------------------------------------------------------
#--***********************************************************************************
## rx_lane_pdwn
#scom 0x800.0b(rx_mode_pl)(rx_grp0)(def_all_lanes).0x(xbus0_gcr_addr){
# bits, scom_data;
# rx_lane_pdwn, 0b0;
#}
#
## tx_lane_pdwn
#scom 0x800.0b(tx_mode_pl)(tx_grp0)(def_all_lanes).0x(xbus0_gcr_addr){
# bits, scom_data;
# tx_lane_pdwn, 0b0;
#}
#--**************************************************************************************************************
#----------------------------------------------------------------------------------------------------------------
# ________________ ____ ________ ____ _ __ __ ___ __
# / ____/ ____/ __ \ / __ )__ __/ __/ __/__ _____ / __ \____ ______(_) /___ __ / |/ /___ ______/ /__
# / / __/ / / /_/ / / __ / / / / /_/ /_/ _ \/ ___/ / /_/ / __ `/ ___/ / __/ / / / / /|_/ / __ `/ ___/ //_/
# / /_/ / /___/ _, _/ / /_/ / /_/ / __/ __/ __/ / / ____/ /_/ / / / / /_/ /_/ / / / / / /_/ (__ ) ,<
# \____/\____/_/ |_| /_____/\__,_/_/ /_/ \___/_/ /_/ \__,_/_/ /_/\__/\__, / /_/ /_/\__,_/____/_/|_|
# /____/
#----------------------------------------------------------------------------------------------------------------
#--**************************************************************************************************************
# HW242564: Temporarily mask the GCR Buffer Parity Checker until the source of the error can be found. This ungates the lab.
# 0x800???0002011E3F
# This is applied to all configured clkgrp's via chiplet targetting
scom 0x800.0b(rx_fir1_mask_pg)(rx_grp0,rx_grp1,rx_grp2,rx_grp3)(lane_na).0x(xbus0_gcr_addr) {
bits, scom_data;
rx_pg_fir_err_mask_gcr_buff, 0b1;
}
scom 0x800.0b(tx_fir_mask_pg)(tx_grp0,tx_grp1,tx_grp2,tx_grp3)(lane_na).0x(xbus0_gcr_addr) {
bits, scom_data;
tx_pg_fir_err_mask_gcr_buff, 0b1;
}
scom 0x800.0b(rx_fir_mask_pb)(rx_grp0,rx_grp1,rx_grp2,rx_grp3)(lane_na).0x(xbus0_gcr_addr) {
bits, scom_data;
rx_pb_fir_err_mask_gcr_buff0, 0b1;
rx_pb_fir_err_mask_gcr_buff1, 0b1;
rx_pb_fir_err_mask_gcr_buff2, 0b1;
}
# Mask off all rx and tx parity errors in the fir register
scom 0x04011003 {
scom_data;
0xC000000000000000;
}
############################################################################################
# END OF FILE
############################################################################################
|
