path: root/src/usr/hwpf/hwp/initfiles/p8.a_x_pci_dmi_fir.scom.initfile

#-- $Id: p8.a_x_pci_dmi_fir.scom.initfile,v 1.14 2015/07/17 16:52:32 jmcgill Exp $
#-------------------------------------------------------------------------------
#--
#-- (C) Copyright International Business Machines Corp. 2011
#-- All Rights Reserved -- Property of IBM
#-- ***  ***
#--
#-- TITLE       : p8.a_x_pci_dmi_fir.scom.initfile
#-- DESCRIPTION : Perform base A/X/DMI/PCI base FIR configuration
#--
#-- OWNER NAME  : Joe McGill              Email: jmcgill@us.ibm.com
#--
#--------------------------------------------------------------------------------

SyntaxVersion = 1


#--------------------------------------------------------------------------------
#-- Defines
#--------------------------------------------------------------------------------

define mcl_enabled =  ((ATTR_CHIP_REGIONS_TO_ENABLE[2] & 0x0080000000000000) != 0);
define mcr_enabled =  ((ATTR_CHIP_REGIONS_TO_ENABLE[2] & 0x0040000000000000) != 0);

define xbus_enabled = (ATTR_PROC_X_ENABLE == ENUM_ATTR_PROC_X_ENABLE_ENABLE);
define abus_enabled = (ATTR_PROC_A_ENABLE == ENUM_ATTR_PROC_A_ENABLE_ENABLE);
define pcie_enabled = (ATTR_PROC_PCIE_ENABLE == ENUM_ATTR_PROC_PCIE_ENABLE_ENABLE);

define trace_on_scom = (ATTR_CHIP_EC_FEATURE_TRACE_CONTROL_ON_SCOM != 0);
define nv_present    = (ATTR_CHIP_EC_FEATURE_NV_PRESENT != 0);

define single_xbus_present = (ATTR_CHIP_EC_FEATURE_SINGLE_XBUS_PRESENT != 0);

#--------------------------------------------------------------------------------
#-- SCOM initializations
#--------------------------------------------------------------------------------


#-- IOMC# (DMI)
#-- set base configuration for IOMC FIR, leaving link specific FIR bits *masked*
#-- (will be unmasked by IO training procedure)
#-- IOMC0.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x02011A06 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (mcl_enabled);
}

#-- IOMC0.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x02011A07 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, (mcl_enabled);
}

#-- IOMC0.BUSCTL.SCOM.FIR_MASK_REG
scom 0x02011A03 {
    bits, scom_data,          expr;
    0:63, 0xDFFFFFFFFFFFC000, (mcl_enabled);
}

#-- IOMC1.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x02011E06 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (mcr_enabled);
}

#-- IOMC1.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x02011E07 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, (mcr_enabled);
}

#-- IOMC1.BUSCTL.SCOM.FIR_MASK_REG
scom 0x02011E03 {
    bits, scom_data,          expr;
    0:63, 0xDFFFFFFFFFFFC000, (mcr_enabled);
}

#-- IOMC0 bus initialization/powerdown settings
#-- IOMC0.TX_WRAP.TX3.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C946002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000000,          (mcl_enabled);
} 

#-- IOMC0.RX3.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008506002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000000,          (mcl_enabled);
} 

#-- IOMC0.TX_WRAP.TX2.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C944002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000001,          (mcl_enabled);
} 

#-- IOMC0.RX2.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008504002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000001,          (mcl_enabled);
}

#-- IOMC0.TX_WRAP.TX0.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C940002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000010,          (mcl_enabled);
} 

#-- IOMC0.RX0.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008500002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000010,          (mcl_enabled);
} 

#-- IOMC0.TX_WRAP.TX1.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C942002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000011,          (mcl_enabled);
} 

#-- IOMC0.RX1.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008502002011A3F {
    bits,  scom_data,         expr;
    48:53, 0b000011,          (mcl_enabled);
}

#-- IOMC0 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN
scom 0x800001FF02011A3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcl_enabled);
}

#-- IOMC0 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN
scom 0x800405FF02011A3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcl_enabled);
}

#-- IOMC0 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800929E002011A3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcl_enabled);
}

#-- IOMC0 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800931E002011A3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcl_enabled);
}

#-- IOMC0 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN
scom 0x800801E002011A3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcl_enabled);
}

#-- IOMC0 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800D1DE002011A3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcl_enabled);
}

#-- IOMC0 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800D25E002011A3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcl_enabled);
}

#-- IOMC0 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN
scom 0x800C05E002011A3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcl_enabled);
}

#-- IOMC0 RX_FENCE_PG (broadcast to all groups), set RX_FENCE
scom 0x8009A9E002011A3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcl_enabled);
}

#-- IOMC1 bus initialization/powerdown settings
#-- IOMC1.TX_WRAP.TX3.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C946002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000000,          (mcr_enabled);
} 

#-- IOMC1.RX3.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008506002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000000,          (mcr_enabled);
} 

#-- IOMC1.TX_WRAP.TX2.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C944002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000001,          (mcr_enabled);
} 

#-- IOMC1.RX2.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008504002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000001,          (mcr_enabled);
}

#-- IOMC1.TX_WRAP.TX0.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C940002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000010,          (mcr_enabled);
} 

#-- IOMC1.RX0.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008500002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000010,          (mcr_enabled);
} 

#-- IOMC1.TX_WRAP.TX1.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C942002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000011,          (mcr_enabled);
} 

#-- IOMC1.RX1.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008502002011E3F {
    bits,  scom_data,         expr;
    48:53, 0b000011,          (mcr_enabled);
}

#-- IOMC1 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN
scom 0x800001FF02011E3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcr_enabled);
}

#-- IOMC1 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN
scom 0x800405FF02011E3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcr_enabled);
}

#-- IOMC1 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800929E002011E3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcr_enabled);
}

#-- IOMC1 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800931E002011E3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcr_enabled);
}

#-- IOMC1 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN
scom 0x800801E002011E3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcr_enabled);
}

#-- IOMC1 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800D1DE002011E3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcr_enabled);
}

#-- IOMC1 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800D25E002011E3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (mcr_enabled);
}

#-- IOMC1 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN
scom 0x800C05E002011E3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcr_enabled);
}

#-- IOMC1 RX_FENCE_PG (broadcast to all groups), set RX_FENCE
scom 0x8009A9E002011E3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (mcr_enabled);
}


#-- XBUS IO (EI4)
#-- set base configuration for FIR, leaving link specific FIR bits *masked*
#-- (will be unmasked by IO training procedure)

#-- X0
#-- XBUS01.X0.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x04011006 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, ((xbus_enabled) && (!single_xbus_present));
}

#-- XBUS01.X0.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x04011007 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && (!single_xbus_present));
}

#-- XBUS01.X0.BUSCTL.SCOM.FIR_MASK_REG
scom 0x04011003 {
    bits, scom_data,          expr;
    0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X1
#-- XBUS1.BUSCTL.SCOM.FIR_ACTION0_REG
#-- XBUS01.X1.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x04011406 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (xbus_enabled);
}

#-- XBUS1.BUSCTL.SCOM.FIR_ACTION1_REG
#-- XBUS01.X1.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x04011407 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, (xbus_enabled);
}

#-- XBUS1.BUSCTL.SCOM.FIR_MASK_REG
#-- XBUS01.X1.BUSCTL.SCOM.FIR_MASK_REG
scom 0x04011403 {
    bits, scom_data,          expr;
    0:63, 0xDFFFFFFFFFFFC000, (xbus_enabled);
}

#-- X3
#-- XBUS23.X0.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x04011806 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, ((xbus_enabled) && (!single_xbus_present));
}

#-- XBUS23.X0.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x04011807 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && (!single_xbus_present));
}

#-- XBUS23.X0.BUSCTL.SCOM.FIR_MASK_REG
scom 0x04011803 {
    bits, scom_data,          expr;
    0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2
#-- XBUS23.X1.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x04011C06 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, ((xbus_enabled) && (!single_xbus_present));
}

#-- XBUS23.X1.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x04011C07 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, ((xbus_enabled) && (!single_xbus_present));
}

#-- XBUS23.X1.BUSCTL.SCOM.FIR_MASK_REG
scom 0x04011C03 {
    bits, scom_data,          expr;
    0:63, 0xDFFFFFFFFFFFC000, ((xbus_enabled) && (!single_xbus_present));
}

#-- bus powerdown settings
#-- X0 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN
scom 0x800001FF0401103F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN
scom 0x800405FF0401103F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800929E00401103F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800931E00401103F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN
scom 0x800801E00401103F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800D1DE00401103F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800D25E00401103F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN
scom 0x800C05E00401103F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X0 RX_FENCE_PG (broadcast to all groups), set RX_FENCE
scom 0x8009A9E00401103F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X1 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN
scom 0x800001FF0401143F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (xbus_enabled);
}

#-- X1 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN
scom 0x800405FF0401143F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (xbus_enabled);
}

#-- X1 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800929E00401143F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (xbus_enabled);
}

#-- X1 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800931E00401143F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (xbus_enabled);
}

#-- X1 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN
scom 0x800801E00401143F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (xbus_enabled);
}

#-- X1 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800D1DE00401143F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (xbus_enabled);
}

#-- X1 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800D25E00401143F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (xbus_enabled);
}

#-- X1 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN
scom 0x800C05E00401143F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (xbus_enabled);
}

#-- X1 RX_FENCE_PG (broadcast to all groups), set RX_FENCE
scom 0x8009A9E00401143F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (xbus_enabled);
}

#-- X2 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN
scom 0x800001FF04011C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN
scom 0x800405FF04011C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800929E004011C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800931E004011C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN
scom 0x800801E004011C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800D1DE004011C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800D25E004011C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN
scom 0x800C05E004011C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X2 RX_FENCE_PG (broadcast to all groups), set RX_FENCE
scom 0x8009A9E004011C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN
scom 0x800001FF0401183F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled)  && (!single_xbus_present));
}

#-- X3 TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN
scom 0x800405FF0401183F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800929E00401183F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800931E00401183F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN
scom 0x800801E00401183F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800D1DE00401183F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800D25E00401183F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN
scom 0x800C05E00401183F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}

#-- X3 RX_FENCE_PG (broadcast to all groups), set RX_FENCE
scom 0x8009A9E00401183F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, ((xbus_enabled) && (!single_xbus_present));
}


#-- XBUS PB (PBEN)
#-- set base configuration for FIR, leaving link specific FIR bits *masked*
#-- (will be unmasked by iovalid procedure)
#-- EN.PB.PBEN.MISC_IO.SCOM.FIR_REG_ACTION0
scom 0x04010C06 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (xbus_enabled);
}

#-- EN.PB.PBEN.MISC_IO.SCOM.FIR_REG_ACTION1
scom 0x04010C07 {
    bits, scom_data,          expr;
    0:63, 0x9248000000000000, (xbus_enabled);
}

#-- EN.PB.PBEN.MISC_IO.SCOM.FIR_MASK_REG
scom 0x04010C03 {
    bits, scom_data,          expr;
    0:63, 0xFFF4F7FFFC000000, (xbus_enabled);
}

#-- XBUS pervasive LFIR
#-- EN.PB.TPC.EPS.FIR.LOCAL_FIR_ACTION0
scom 0x04040010 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (xbus_enabled);
}

#-- EN.PB.TPC.EPS.FIR.LOCAL_FIR_ACTION1
scom 0x04040011 {
    bits, scom_data,          expr;
    0:63, 0x8002000000000000, (xbus_enabled);
}

#-- EN.PB.TPC.EPS.FIR.LOCAL_FIR_MASK
scom 0x0404000D {
    bits, scom_data,          expr;
    0:63, 0x7FFDFFFFFF800000, (xbus_enabled);
}

#-- XBUS chiplet XFIR
#-- EN.PB.TPC.FIR_MASK
scom 0x04040002 {
    bits, scom_data,          expr;
    0:63, 0x203FFFE000000000, (xbus_enabled);
}

#-- configure chiplet trace arrays to stop on checkstop
scom 0x040107C0 {
    bits, scom_data,          expr;
    7,    0b1,                (xbus_enabled && trace_on_scom);
}

scom 0x040107CB {
    bits, scom_data,          expr;
    17,    0b1,               (xbus_enabled && trace_on_scom);
}


#-- ABUS IO (EDI) / NV IO
#-- set base configuration for FIR, leaving link specific FIR bits *masked*
#-- (will be unsmaked by IO training procedure)
#-- ABUS.BUSCTL.SCOM.FIR_ACTION0_REG
#-- NVBUS0.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x08010C06 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (abus_enabled);
}

#-- ABUS.BUSCTL.SCOM.FIR_ACTION1_REG
#-- NVBUS0.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x08010C07 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, (abus_enabled);
}

#-- ABUS.BUSCTL.SCOM.FIR_MASK_REG
#-- NVBUS0.BUSCTL.SCOM.FIR_MASK_REG
scom 0x08010C03 {
    bits, scom_data,          expr;
    0:63, 0xDFFFFFFFFFFFC000, (abus_enabled) && (!nv_present);
    0:63, 0x1FFFFFFFFFFFC000, (abus_enabled) && (nv_present);
}

#-- NVBUS1.BUSCTL.SCOM.FIR_ACTION0_REG
scom 0x08010C46 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (abus_enabled) && (nv_present);
}

#-- NVBUS1.BUSCTL.SCOM.FIR_ACTION1_REG
scom 0x08010C47 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFC000, (abus_enabled) && (nv_present);
}

#-- NVBUS1.BUSCTL.SCOM.FIR_MASK_REG
scom 0x08010C43 {
    bits, scom_data,          expr;
    0:63, 0x1FFFFFFFFFFFC000, (abus_enabled) && (nv_present);
}

#-- ABUS bus initialization/powerdown settings
#-- ABUS.TX_WRAP.TX0.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C940008010C3F {
    bits,  scom_data,         expr;
    48:53, 0b000001,          (abus_enabled) && (!nv_present);
}

#-- ABUS.RX0.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008500008010C3F {
    bits,  scom_data,         expr;
    48:53, 0b000001,          (abus_enabled) && (!nv_present);
}

#-- ABUS.TX_WRAP.TX1.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C942008010C3F {
    bits,  scom_data,         expr;
    48:53, 0b000010,          (abus_enabled) && (!nv_present);
}

#-- ABUS.RX1.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008502008010C3F {
    bits,  scom_data,         expr;
    48:53, 0b000010,          (abus_enabled) && (!nv_present);
}

#-- ABUS.TX_WRAP.TX2.TXCTL.TX_CTL_REGS.TX_ID1_PG
scom 0x800C944008010C3F {
    bits,  scom_data,         expr;
    48:53, 0b000011,          (abus_enabled) && (!nv_present);
}

#-- ABUS.RX2.RXCTL.RX_CTL_REGS.RX_ID1_PG
scom 0x8008504008010C3F {
    bits,  scom_data,         expr;
    48:53, 0b000011,          (abus_enabled) && (!nv_present);
}

#-- ABUS RX_MODE_PL (broadcast to all groups/lanes), set RX_LANE_PDWN
scom 0x800001FF08010C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (abus_enabled) && (!nv_present);
}

#-- ABUS TX_MODE_PL (broadcast to all groups/lanes), set TX_LANE_PDWN
scom 0x800405FF08010C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (abus_enabled) && (!nv_present);
}

#-- ABUS RX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800929E008010C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (abus_enabled) && (!nv_present);
}

#-- ABUS RX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800931E008010C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (abus_enabled) && (!nv_present);
}

#-- ABUS RX_CLK_MODE_PG (broadcast to all groups), set RX_CLK_PDWN
scom 0x800801E008010C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (abus_enabled) && (!nv_present);
}

#-- ABUS TX_LANE_DISABLED_VEC_0_15_PG (broadcast to all groups), disable all
scom 0x800D1DE008010C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (abus_enabled) && (!nv_present);
}

#-- ABUS TX_LANE_DISABLED_VEC_16_31_PG (broadcast to all groups), disable all
scom 0x800D25E008010C3F {
    bits, scom_data,          expr;
    0:63, 0x000000000000FFFF, (abus_enabled) && (!nv_present);
}

#-- ABUS TX_CLK_MODE_PG (broadcast to all groups), set TX_CLK_PDWN
scom 0x800C05E008010C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (abus_enabled) && (!nv_present);
}

#-- ABUS RX_FENCE_PG (broadcast to all groups), set RX_FENCE
scom 0x8009A9E008010C3F {
    bits, scom_data,          expr;
    0:63, 0x0000000000008000, (abus_enabled) && (!nv_present);
}

#-- ABUS PB (PBES)
#-- set base configuration for FIR, leaving link specific FIR bits *masked*
#-- (will be unmasked by iovalid procedure)
#-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IO.SCOM.PB_IOA_FIR_ACTION0_REG
scom 0x08010806 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (abus_enabled) && (!nv_present);
}

#-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IO.SCOM.PB_IOA_FIR_ACTION1_REG
scom 0x08010807 {
    bits, scom_data,          expr;
    0:63, 0x0249861800000000, (abus_enabled) && (!nv_present);
}

#-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IO.SCOM.PB_IOA_FIR_MASK_REG
scom 0x08010803 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFC000000, (abus_enabled) && (!nv_present);
}

#-- ABUS pervasive LFIR
#-- ES.PBES_WRAP_TOP.TPC.EPS.FIR.LOCAL_FIR_ACTION0
scom 0x08040010 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (abus_enabled);
}

#-- ES.PBES_WRAP_TOP.TPC.EPS.FIR.LOCAL_FIR_ACTION1
scom 0x08040011 {
    bits, scom_data,          expr;
    0:63, 0x8000000000000000, (abus_enabled);
}

#-- ES.PBES_WRAP_TOP.TPC.EPS.FIR.LOCAL_FIR_MASK
scom 0x0804000D {
    bits, scom_data,          expr;
    0:63, 0x7FFFFFFFFF800000, (abus_enabled);
}

#-- ABUS chiplet XFIR
#-- ES.PBES_WRAP_TOP.TPC.FIR_MASK
scom 0x08040002 {
    bits, scom_data,          expr;
    0:63, 0x23FFFFE000000000, (abus_enabled) && (!nv_present);
    0:63, 0x20FFFFE000000000, (abus_enabled) && (nv_present);
}

#-- configure chiplet trace arrays to stop on checkstop
scom 0x080107C0 {
    bits, scom_data,          expr;
    7,    0b1,                (abus_enabled && trace_on_scom);
}

scom 0x080107CB {
    bits, scom_data,          expr;
    17,    0b1,               (abus_enabled && trace_on_scom);
}


#-- FBUS PB
#-- set base configuration for FIR, leaving link specific FIR bits *masked*
#-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_ACTION0_REG
scom 0x09010806 {
    bits, scom_data,          expr;
    0:63, 0xFE082030FE082030, (pcie_enabled) && (!nv_present);
}

#-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_ACTION1_REG
scom 0x09010807 {
    bits, scom_data,          expr;
    0:63, 0x01D7DFCC01D7DFCC, (pcie_enabled) && (!nv_present);
}

#-- ES.PBES_WRAP_TOP.PBES_TOP.MISC_IOF.SCOM.PB_IOF_FIR_MASK_REG
scom 0x09010803 {
    bits, scom_data,          expr;
    0:63, 0xFFFFFFFFFFFFFFFF, (pcie_enabled) && (!nv_present);
}

#-- PCIE pervasive LFIR
#-- ES.PE_WRAP_TOP.TPC.EPS.FIR.LOCAL_FIR_ACTION0
scom 0x09040010 {
    bits, scom_data,          expr;
    0:63, 0x0000000000000000, (pcie_enabled);
}

#-- ES.PE_WRAP_TOP.TPC.EPS.FIR.LOCAL_FIR_ACTION1
scom 0x09040011 {
    bits, scom_data,          expr;
    0:63, 0x8000000000000000, (pcie_enabled);
}

#-- ES.PE_WRAP_TOP.TPC.EPS.FIR.LOCAL_FIR_MASK
scom 0x0904000D {
    bits, scom_data,          expr;
    0:63, 0x7FFFFFFFFF800000, (pcie_enabled);
}

#-- PCIE chiplet XFIR
#-- ES.PE_WRAP_TOP.TPC.FIR_MASK
scom 0x09040002 {
    bits, scom_data,          expr;
    0:63, 0x211FFFE000000000, (pcie_enabled);
}

#-- configure chiplet trace arrays to stop on checkstop
scom 0x090107C0 {
    bits, scom_data,          expr;
    7,    0b1,                (pcie_enabled && trace_on_scom);
}

scom 0x090107CB {
    bits, scom_data,          expr;
    17,    0b1,               (pcie_enabled && trace_on_scom);
}