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<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: src/usr/hwpf/hwp/dram_training/memory_mss_termination_control.xml $ -->
<!-- -->
<!-- IBM CONFIDENTIAL -->
<!-- -->
<!-- COPYRIGHT International Business Machines Corp. 2013 -->
<!-- -->
<!-- p1 -->
<!-- -->
<!-- Object Code Only (OCO) source materials -->
<!-- Licensed Internal Code Source Materials -->
<!-- IBM HostBoot Licensed Internal Code -->
<!-- -->
<!-- The source code for this program is not published or otherwise -->
<!-- divested of its trade secrets, irrespective of what has been -->
<!-- deposited with the U.S. Copyright Office. -->
<!-- -->
<!-- Origin: 30 -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<hwpErrors>
<!-- $Id: memory_mss_termination_control.xml,v 1.1 2013/06/19 18:28:31 bellows Exp $ -->
<!-- For file ../../ipl/fapi/mss_termination_control.C -->
<!-- // *! OWNER NAME : Saravanan Sethuraman email ID:saravanans@in.ibm.com -->
<!-- // *! BACKUP NAME: Menlo Wuu email ID:menlowuu@us.ibm.com -->
<!-- Original Source for RC_MSS_IMP_INPUT_ERROR memory_errors.xml -->
<hwpError>
<rc>RC_MSS_IMP_INPUT_ERROR</rc>
<description>Impedance is invalid for driver/receiver type.</description>
</hwpError>
<!-- Original Source for RC_MSS_INVALID_DRAM_GEN memory_errors.xml -->
<hwpError>
<rc>RC_MSS_INVALID_DRAM_GEN</rc>
<description>DRAM_GEN attribute is not valid; equals 0 for empty.</description>
</hwpError>
<!-- Original Source for RC_MSS_INVALID_FREQ memory_errors.xml -->
<hwpError>
<rc>RC_MSS_INVALID_FREQ</rc>
<description>MSS_FREQ attribute equals 0.</description>
</hwpError>
<!-- Original Source for RC_MSS_SLEW_CAL_ERROR memory_errors.xml -->
<hwpError>
<rc>RC_MSS_SLEW_CAL_ERROR</rc>
<description>Slew calibration error occurred.</description>
</hwpError>
</hwpErrors>
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