summaryrefslogtreecommitdiffstats
path: root/src/usr/hwpf/hwp/core_activate/core_activate.C
blob: e91845354627bc3f73939d3db680fbbd76eb617c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: src/usr/hwpf/hwp/core_activate/core_activate.C $              */
/*                                                                        */
/* IBM CONFIDENTIAL                                                       */
/*                                                                        */
/* COPYRIGHT International Business Machines Corp. 2012,2013              */
/*                                                                        */
/* p1                                                                     */
/*                                                                        */
/* Object Code Only (OCO) source materials                                */
/* Licensed Internal Code Source Materials                                */
/* IBM HostBoot Licensed Internal Code                                    */
/*                                                                        */
/* The source code for this program is not published or otherwise         */
/* divested of its trade secrets, irrespective of what has been           */
/* deposited with the U.S. Copyright Office.                              */
/*                                                                        */
/* Origin: 30                                                             */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
/**
 *  @file core_activate.C
 *
 *  Support file for IStep: core_activate
 *   Core Activate
 *
 *  HWP_IGNORE_VERSION_CHECK
 *
 */

/******************************************************************************/
// Includes
/******************************************************************************/
#include    <stdint.h>

#include    <trace/interface.H>
#include    <initservice/taskargs.H>
#include    <errl/errlentry.H>

#include    <initservice/isteps_trace.H>
#include    <initservice/istepdispatcherif.H>

#include    <hwpisteperror.H>

//  targeting support
#include    <targeting/common/commontargeting.H>
#include    <targeting/common/utilFilter.H>
#include    <targeting/namedtarget.H>
#include    <targeting/attrsync.H>

//  fapi support
#include    <fapi.H>
#include    <fapiPlatHwpInvoker.H>
#include    <hwpf/istepreasoncodes.H>

#include    "core_activate.H"
#include    <sys/task.h>
#include    <sys/misc.h>

//  Uncomment these files as they become available:
#include    "proc_prep_master_winkle.H"
#include    "proc_stop_deadman_timer.H"
#include    "p8_set_pore_bar.H"
// #include    "host_activate_slave_cores/host_activate_slave_cores.H"
#include    "proc_switch_cfsim.H"

namespace   CORE_ACTIVATE
{

using   namespace   TARGETING;
using   namespace   fapi;
using   namespace   ISTEP;
using   namespace   ISTEP_ERROR;



//
//  Wrapper function to call host_activate_master
//
void*    call_host_activate_master( void    *io_pArgs )
{

    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
               "call_host_activate_master entry" );

    errlHndl_t  l_errl  =   NULL;
    IStepError  l_stepError;

    // @@@@@    CUSTOM BLOCK:   @@@@@

    do  {

        // find the master core, i.e. the one we are running on
        TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                   "call_host_activate_master: Find master core: " );

        const TARGETING::Target*  l_masterCore  = getMasterCore( );
        assert( l_masterCore != NULL );

        TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                   "call_host_activate_master: Find master chip: " );
        TARGETING::Target* l_cpu_target = const_cast<TARGETING::Target *>
                                          ( getParentChip( l_masterCore ) );

        //  dump physical path to target
        EntityPath l_path;
        l_path  =   l_cpu_target->getAttr<ATTR_PHYS_PATH>();
        l_path.dump();

        // cast OUR type of target to a FAPI type of target.
        const fapi::Target l_fapi_cpu_target(
                                            TARGET_TYPE_PROC_CHIP,
                                            reinterpret_cast<void *>
                                            (const_cast<TARGETING::Target*>
                                                        (l_cpu_target)) );

        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
               "call_host_activate_master: call proc_prep_master_winkle." );


        //  call the HWP with each fapi::Target
        FAPI_INVOKE_HWP( l_errl,
                         proc_prep_master_winkle,
                         l_fapi_cpu_target,
                         true  );
        if ( l_errl )
        {
            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
            "proc_prep_master_winkle ERROR : Returning errorlog, PLID=0x%x",
                l_errl->plid() );
            break;
        }
        else
        {
            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                       "proc_prep_master_winkle SUCCESS"  );
        }


        //  put the master into winkle.
        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                   "call_host_activate_master: put master into winkle..." );

        int l_rc    =   cpu_master_winkle( );
        if ( l_rc )
        {
            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
                      "ERROR : failed to winkle master, rc=0x%x",
                      l_rc  );
            /*@
             * @errortype
             * @reasoncode  ISTEP_FAIL_MASTER_WINKLE_RC
             * @severity    ERRORLOG::ERRL_SEV_UNRECOVERABLE
             * @moduleid    ISTEP_HOST_ACTIVATE_MASTER
             * @userdata1   return code from cpu_master_winkle
             *
             * @devdesc p8_pore_gen_cpureg returned an error when
             *          attempting to change a reg value in the PORE image.
             */
            l_errl =
            new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
                                    ISTEP_HOST_ACTIVATE_MASTER,
                                    ISTEP_FAIL_MASTER_WINKLE_RC,
                                    l_rc  );
            break;
        }


        //  --------------------------------------------------------
        //  should return from Winkle at this point
        //  --------------------------------------------------------
        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                   "Returned from Winkle." );

        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                   "Call proc_stop_deadman_timer..." );

        //  call the HWP with each fapi::Target
        FAPI_INVOKE_HWP( l_errl,
                         proc_stop_deadman_timer,
                         l_fapi_cpu_target  );
        if ( l_errl )
        {
            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                       "proc_stop_deadman_timer ERROR : Returning errorlog, PLID=0x%x",
                       l_errl->plid() );
            break;
        }
        else
        {
            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                       "proc_prep_master_winkle SUCCESS"  );
        }

    }   while ( 0 );

    // @@@@@    END CUSTOM BLOCK:   @@@@@
    if( l_errl )
    {
        /*@
         * @errortype
         * @reasoncode      ISTEP_CORE_ACTIVATE_FAILED
         * @severity        ERRORLOG::ERRL_SEV_UNRECOVERABLE
         * @moduleid        ISTEP_HOST_ACTIVATE_MASTER
         * @userdata1       bytes 0-1: plid identifying first error
         *                  bytes 2-3: reason code of first error
         * @userdata2       bytes 0-1: total number of elogs included
         *                  bytes 2-3: N/A
         * @devdesc         call to host_activate_master failed see
         *                  error identified by the plid in user data
         *                  field.
         */
        l_stepError.addErrorDetails(ISTEP_CORE_ACTIVATE_FAILED,
                         ISTEP_HOST_ACTIVATE_MASTER,
                         l_errl );

        errlCommit( l_errl, HWPF_COMP_ID );
    }

    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
               "call_host_activate_master exit" );

    // end task, returning any errorlogs to IStepDisp
    return l_stepError.getErrorHandle();

}



//
//  Wrapper function to call host_activate_slave_cores
//
void*    call_host_activate_slave_cores( void    *io_pArgs )
{
    errlHndl_t  l_errl  =   NULL;

    IStepError  l_stepError;

    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
               "call_host_activate_slave_cores entry" );

    // @@@@@    CUSTOM BLOCK:   @@@@@

    uint64_t l_masterCoreID = task_getcpuid() & ~7;

    TargetHandleList l_cores;
    getAllChiplets(l_cores, TYPE_CORE);

    for(TargetHandleList::const_iterator l_core = l_cores.begin();
        l_core != l_cores.end();
        ++l_core)
    {
        ConstTargetHandle_t l_processor = getParentChip(*l_core);

        CHIP_UNIT_ATTR l_coreId =
                (*l_core)->getAttr<TARGETING::ATTR_CHIP_UNIT>();
        FABRIC_NODE_ID_ATTR l_logicalNodeId =
                l_processor->getAttr<TARGETING::ATTR_FABRIC_NODE_ID>();
        FABRIC_CHIP_ID_ATTR l_chipId =
                l_processor->getAttr<TARGETING::ATTR_FABRIC_CHIP_ID>();

        uint64_t pir = l_coreId << 3;
        pir |= l_chipId << 7;
        pir |= l_logicalNodeId << 10;

        if (pir != l_masterCoreID)
        {
            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                       "call_host_activate_slave_cores: Waking %x", pir);

            int rc = cpu_start_core(pir);

            // We purposefully only create one error log here.  The only
            // failure from the kernel is a bad PIR, which means we have
            // a pervasive attribute problem of some sort.  Just log the
            // first failing PIR.
            if ((0 != rc) && (NULL == l_errl))
            {
                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                           "call_host_activate_slave_cores: Error from kernel"
                           " %d on core %x",
                           rc, pir);
                /*@
                 * @errortype
                 * @reasoncode  ISTEP_BAD_RC
                 * @severity    ERRORLOG::ERRL_SEV_UNRECOVERABLE
                 * @moduleid    ISTEP_HOST_ACTIVATE_SLAVE_CORES
                 * @userdata1   PIR of failing core.
                 * @userdata2   rc of cpu_start_core().
                 *
                 * @devdesc Kernel returned error when trying to activate core.
                 */
                l_errl =
                    new ERRORLOG::ErrlEntry(ERRORLOG::ERRL_SEV_UNRECOVERABLE,
                                            ISTEP_HOST_ACTIVATE_SLAVE_CORES,
                                            ISTEP_BAD_RC,
                                            pir,
                                            rc );
            }
        }
    }

    if ( ! l_errl )
    {
        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                   "set PORE bars back to 0" );

        //  @todo   see RTC 51264 -
        //  This has to be modified if we are loading other AVP's instead
        //  of PHYP
        TARGETING::TargetHandleList l_procTargetList;
        getAllChips(l_procTargetList, TYPE_PROC);

        // loop thru all the cpu's
        for ( uint8_t l_procNum=0; l_procNum < l_procTargetList.size(); l_procNum++)
        {
            //  make a local copy of the CPU target
            TARGETING::Target*  l_proc_target = l_procTargetList[l_procNum];

            //  dump physical path to target
            EntityPath l_path;
            l_path  =   l_proc_target->getAttr<ATTR_PHYS_PATH>();
            l_path.dump();

            // cast OUR type of target to a FAPI type of target.
            fapi::Target l_fapi_proc_target(
                                           TARGET_TYPE_PROC_CHIP,
                                           reinterpret_cast<void *>
                                           (const_cast<TARGETING::Target*>(l_proc_target)) );

            //  reset pore bar notes:
            //  A mem_size of 0 means to ignore the image address
            //  This image should have been moved to memory after winkle

            //  call the HWP with each fapi::Target
            FAPI_INVOKE_HWP( l_errl,
                             p8_set_pore_bar,
                             l_fapi_proc_target,
                             0,
                             0,
                             0,
                             SLW_MEMORY
                           );
            if ( l_errl )
            {
                /*@
                 * @errortype
                 * @reasoncode      ISTEP_RESET_PORE_BARS_FAILED
                 * @severity        ERRORLOG::ERRL_SEV_UNRECOVERABLE
                 * @moduleid        ISTEP_HOST_ACTIVATE_SLAVE_CORES
                 * @userdata1       0
                 * @userdata2       0
                 * @devdesc         call to set_pore_bars failed.
                 *                  see error identified by the plid in
                 *                  user data field.
                 */
                l_stepError.addErrorDetails(ISTEP_RESET_PORE_BARS_FAILED,
                                            ISTEP_HOST_ACTIVATE_SLAVE_CORES,
                                            l_errl );

                errlCommit( l_errl, HWPF_COMP_ID );

                TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
                          "ERROR : p8_set_pore_bar, PLID=0x%x",
                          l_errl->plid()  );
            }
            else
            {
                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                           "SUCCESS : p8_set_pore_bar" );
            }

        }   // end for
    }   // end if

    // @@@@@    END CUSTOM BLOCK:   @@@@@

    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
               "call_host_activate_slave_cores exit" );

    // end task, returning any errorlogs to IStepDisp
    return l_stepError.getErrorHandle();
}



//
//  Wrapper function to call host_ipl_complete
//
void*    call_host_ipl_complete( void    *io_pArgs )
{
    errlHndl_t  l_err  =   NULL;

    IStepError  l_stepError;

    TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
               "call_host_ipl_complete entry" );
    do
    {
        // We only need to do this to the master Processor.

        TARGETING::Target * l_masterProc =   NULL;
        (void)TARGETING::targetService().masterProcChipTargetHandle( l_masterProc );

        const fapi::Target l_fapi_proc_target(
                TARGET_TYPE_PROC_CHIP,
                reinterpret_cast<void *>
                ( const_cast<TARGETING::Target*>(l_masterProc) ) );

        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                    "Running proc_switch_cfsim HWP on ...");
        EntityPath l_path;
        l_path  =   l_masterProc->getAttr<ATTR_PHYS_PATH>();
        l_path.dump();

        //  call proc_switch_cfsim
        FAPI_INVOKE_HWP(l_err, proc_switch_cfsim, l_fapi_proc_target,
                        true, // RESET
                        true, // RESET_OPB_SWITCH
                        true, // FENCE_FSI0
                        true, // FENCE_PIB_NH
                        true, // FENCE_PIB_H
                        true, // FENCE_FSI1
                        true); // FENCE_PIB_SW1
        if (l_err)
        {
            TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace,
                      "ERROR 0x%.8X: proc_switch_cfsim HWP returns error",
                      l_err->reasonCode());
            break;
        }
        else
        {
            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                       "SUCCESS: proc_switch_cfsim HWP( )" );
        }

        // Sync attributes to Fsp
        l_err = syncAllAttributesToFsp();

        if( l_err )
        {
            break;
        }

        // Send Sync Point to Fsp
        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
                   INFO_MRK"Send SYNC_POINT_REACHED msg to Fsp" );
        l_err = INITSERVICE::sendSyncPoint();

    } while( 0 );

    if( l_err )
    {
        /*@
         * @errortype
         * @reasoncode      ISTEP_CORE_ACTIVATE_FAILED
         * @severity        ERRORLOG::ERRL_SEV_UNRECOVERABLE
         * @moduleid        ISTEP_HOST_IPL_COMPLETE
         * @userdata1       bytes 0-1: plid identifying first error
         *                  bytes 2-3: reason code of first error
         * @userdata2       bytes 0-1: total number of elogs included
         *                  bytes 2-3: N/A
         * @devdesc         call to host_ipl_complete failed see
         *                  error identified by the plid in user data
         *                  field.
         */
        l_stepError.addErrorDetails(ISTEP_CORE_ACTIVATE_FAILED,
                                    ISTEP_HOST_IPL_COMPLETE,
                                    l_err );

        errlCommit( l_err, HWPF_COMP_ID );
    }

    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
               "call_host_ipl_complete exit ");


    // end task, returning any errorlogs to IStepDisp
    return l_stepError.getErrorHandle();
}


};   // end namespace
OpenPOWER on IntegriCloud