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<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_fab_smp_fabric_attributes.xml $ -->
<!-- -->
<!-- IBM CONFIDENTIAL -->
<!-- -->
<!-- COPYRIGHT International Business Machines Corp. 2012,2013 -->
<!-- -->
<!-- p1 -->
<!-- -->
<!-- Object Code Only (OCO) source materials -->
<!-- Licensed Internal Code Source Materials -->
<!-- IBM HostBoot Licensed Internal Code -->
<!-- -->
<!-- The source code for this program is not published or otherwise -->
<!-- divested of its trade secrets, irrespective of what has been -->
<!-- deposited with the U.S. Copyright Office. -->
<!-- -->
<!-- Origin: 30 -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<!-- $Id: proc_fab_smp_fabric_attributes.xml,v 1.5 2013/09/19 18:50:18 cswenson Exp $ -->
<!-- proc_fab_smp_fabric_attributes.xml -->
<attributes>
<!-- ********************************************************************* -->
<attribute>
<id>ATTR_FREQ_CORE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
firmware notes:
Nominal processor's core DPLL frequency (MHz).
Default value provided by Machine Readable Workbook.
This attribute is the current value.
</description>
<valueType>uint32</valueType>
<writeable/>
<persistRuntime/>
</attribute>
<!-- ********************************************************************* -->
<attribute>
<id>ATTR_PROC_EPS_GB_PERCENTAGE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
firmware notes:
Guardband percentage to apply to baseline epsilon values
</description>
<valueType>uint8</valueType>
<writeable/>
<persistRuntime/>
</attribute>
<!-- ********************************************************************* -->
<attribute>
<id>ATTR_PROC_EPS_GB_DIRECTION</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
firmware notes:
Direction to apply guardband margin (positive/negative)
</description>
<valueType>uint8</valueType>
<writeable/>
<enum>POSITIVE = 0x0, NEGATIVE = 0x1</enum>
<persistRuntime/>
</attribute>
<!-- ********************************************************************* -->
<attribute>
<id>ATTR_PROC_FABRIC_ASYNC_SAFE_MODE</id>
<targetType>TARGET_TYPE_SYSTEM</targetType>
<description>
firmware notes:
Set to force all asynchronous boundary crossings into safe mode.
</description>
<valueType>uint8</valueType>
<writeable/>
<enum>PERFORMANCE_MODE = 0x0, SAFE_MODE = 0x1</enum>
<persistRuntime/>
</attribute>
<!-- ********************************************************************* -->
<attribute>
<id>ATTR_PROC_PCIE_NOT_F_LINK</id>
<targetType>TARGET_TYPE_PROC_CHIP</targetType>
<description>
firmware notes:
Set IPL time mux/switch between PCIE PHB/F link function
(one per foreign link)
</description>
<valueType>uint8</valueType>
<array>2</array>
<platInit/>
<persistRuntime/>
</attribute>
<!-- ********************************************************************* -->
</attributes>
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