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<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: src/usr/hwpf/hwp/activate_powerbus/proc_build_smp/proc_build_smp_errors.xml $ -->
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
<!-- COPYRIGHT International Business Machines Corp. 2012,2014 -->
<!-- -->
<!-- Licensed under the Apache License, Version 2.0 (the "License"); -->
<!-- you may not use this file except in compliance with the License. -->
<!-- You may obtain a copy of the License at -->
<!-- -->
<!-- http://www.apache.org/licenses/LICENSE-2.0 -->
<!-- -->
<!-- Unless required by applicable law or agreed to in writing, software -->
<!-- distributed under the License is distributed on an "AS IS" BASIS, -->
<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or -->
<!-- implied. See the License for the specific language governing -->
<!-- permissions and limitations under the License. -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<!-- $Id: proc_build_smp_errors.xml,v 1.10 2014/03/27 03:36:41 jmcgill Exp $ -->
<!-- Error definitions for proc_build_smp -->
<hwpErrors>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_CORE_FREQ_RANGE_ERR</rc>
<description>Invalid relationship between ceiling/nominal/floor core frequency attributes.</description>
<ffdc>FREQ_CORE_CEILING</ffdc>
<ffdc>FREQ_CORE_NOM</ffdc>
<ffdc>FREQ_CORE_FLOOR</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_CORE_FLOOR_FREQ_RATIO_ERR</rc>
<description>Unsupported core floor to PB frequency ratio.</description>
<ffdc>FREQ_PB</ffdc>
<ffdc>FREQ_CORE_FLOOR</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_CORE_CEILING_FREQ_RATIO_ERR</rc>
<description>Unsupported core ceiling to PB frequency ratio.</description>
<ffdc>FREQ_PB</ffdc>
<ffdc>FREQ_CORE_CEILING</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_INVALID_OPERATION_ERR</rc>
<description>Unsupported SMP build operation presented.</description>
<ffdc>OP</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_MASTER_DESIGNATION_ERR</rc>
<description>Node or system master chip designation error.</description>
<ffdc>TARGET</ffdc>
<ffdc>OP</ffdc>
<ffdc>MASTER_CHIP_SYS_CURR</ffdc>
<ffdc>MASTER_CHIP_NODE_CURR</ffdc>
<ffdc>MASTER_CHIP_SYS_NEXT</ffdc>
<ffdc>MASTER_CHIP_NODE_NEXT</ffdc>
<ffdc>SYS_RECONFIG_MASTER_SET</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_NODE_ADD_INTERNAL_ERR</rc>
<description>Internal Error. Error encountered adding node to SMP structure.</description>
<ffdc>TARGET</ffdc>
<ffdc>NODE_ID</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_DUPLICATE_FABRIC_ID_ERR</rc>
<description>Multiple chips found with identifcal fabric node/chip ID attribute values.</description>
<ffdc>TARGET1</ffdc>
<ffdc>TARGET2</ffdc>
<ffdc>NODE_ID</ffdc>
<ffdc>CHIP_ID</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_NO_MASTER_SPECIFIED_ERR</rc>
<description>Input parameters do not specify a new fabric system master.</description>
<ffdc>OP</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_ADU_STATUS_MISMATCH</rc>
<description>Status mismatch detected on ADU operation executed for SMP configuration.</description>
<ffdc>TARGET</ffdc>
<ffdc>ADU_STATUS_DATA</ffdc>
<ffdc>ADU_NUM_POLLS</ffdc>
<ffdc>FFDC_VALID</ffdc>
<ffdc>NUM_CHIPS</ffdc>
<ffdc>CHIP_IDS</ffdc>
<ffdc>PB_MODE_CENT_DATA</ffdc>
<ffdc>PB_HP_MODE_NEXT_CENT_DATA</ffdc>
<ffdc>PB_HP_MODE_CURR_CENT_DATA</ffdc>
<ffdc>PB_HPX_MODE_NEXT_CENT_DATA</ffdc>
<ffdc>PB_HPX_MODE_CURR_CENT_DATA</ffdc>
<ffdc>X_GP0_DATA</ffdc>
<ffdc>PB_X_MODE_DATA</ffdc>
<ffdc>A_GP0_DATA</ffdc>
<ffdc>ADU_IOS_LINK_EN_DATA</ffdc>
<ffdc>PB_A_MODE_DATA</ffdc>
<ffdc>ADU_PMISC_MODE_DATA</ffdc>
<callout>
<procedure>LVL_SUPPORT</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_EPSILON_RANGE_ERR</rc>
<description>Target epsilon value exceeds maximum value supported by HW capabilities.</description>
<ffdc>VALUE</ffdc>
<ffdc>MAX_HW_VALUE</ffdc>
<ffdc>UNIT</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_EPSILON_INVALID_TABLE_ERR</rc>
<description>Invalid epsilon table type or content detected.</description>
<ffdc>TABLE_TYPE</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_INVALID_AGGREGATE_CONFIG_ERR</rc>
<description>Invalid aggregate link configuration detected.</description>
<ffdc>TARGET</ffdc>
<ffdc>X_NOT_A</ffdc>
<ffdc>ALLOW_AGGREGATE</ffdc>
<ffdc>AGGREGATE_DEST_ID1</ffdc>
<ffdc>AGGREGATE_DEST_ID2</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_X_CMD_RATE_ERR</rc>
<description>Target link command rate value is out of range.</description>
<ffdc>FREQ_PB</ffdc>
<ffdc>FREQ_X</ffdc>
<ffdc>X_IS_8B</ffdc>
<ffdc>X_AGGREGATE</ffdc>
<ffdc>N</ffdc>
<ffdc>D</ffdc>
<ffdc>CMD_RATE</ffdc>
<ffdc>MIN_CMD_RATE</ffdc>
<ffdc>MAX_CMD_RATE</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_A_CMD_RATE_ERR</rc>
<description>Target link command rate value is out of range.</description>
<ffdc>FREQ_PB</ffdc>
<ffdc>FREQ_A</ffdc>
<ffdc>A_OW_PACK</ffdc>
<ffdc>A_OW_PACK_PRIORITY</ffdc>
<ffdc>A_AGGREGATE</ffdc>
<ffdc>N</ffdc>
<ffdc>D</ffdc>
<ffdc>CMD_RATE</ffdc>
<ffdc>MIN_CMD_RATE</ffdc>
<ffdc>MAX_CMD_RATE</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_F_CMD_RATE_ERR</rc>
<description>Target link command rate value is out of range.</description>
<ffdc>FREQ_PB</ffdc>
<ffdc>FREQ_F</ffdc>
<ffdc>F_OW_PACK</ffdc>
<ffdc>F_OW_PACK_PRIORITY</ffdc>
<ffdc>F_AGGREGATE</ffdc>
<ffdc>N</ffdc>
<ffdc>D</ffdc>
<ffdc>CMD_RATE</ffdc>
<ffdc>MIN_CMD_RATE</ffdc>
<ffdc>MAX_CMD_RATE</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_HOTPLUG_SHADOW_ERR</rc>
<description>Inconsistent state in hotplug (CURR) shadow copies.</description>
<ffdc>ADDRESS0</ffdc>
<ffdc>ADDRESS1</ffdc>
<ffdc>DATA0</ffdc>
<ffdc>DATA1</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_AX_PARTIAL_GOOD_ERR</rc>
<description>A/X bus partial good attribute state does not allow for action on target.</description>
<ffdc>SOURCE_CHIP_TARGET</ffdc>
<ffdc>CHIPLET_ID</ffdc>
<ffdc>SOURCE_LINK_ID</ffdc>
<ffdc>REGION_ENABLED</ffdc>
<ffdc>REGIONS_TO_ENABLE</ffdc>
<ffdc>REGIONS_TO_ENABLE_VALID</ffdc>
<ffdc>DEST_LINK_TARGET</ffdc>
<callout>
<target>SOURCE_CHIP_TARGET</target>
<priority>HIGH</priority>
</callout>
<callout>
<procedure>CODE</procedure>
<priority>MEDIUM</priority>
</callout>
<deconfigure>
<target>SOURCE_CHIP_TARGET</target>
</deconfigure>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_LINK_TARGET_TYPE_ERR</rc>
<description>Invalid destination link target type detected in input parameters.</description>
<ffdc>SOURCE_CHIP_TARGET</ffdc>
<ffdc>SOURCE_LINK_ID</ffdc>
<ffdc>DEST_LINK_TARGET</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_PCIE_PARTIAL_GOOD_ERR</rc>
<description>PCIE partial good attribute state does not allow for action on target.</description>
<ffdc>SOURCE_CHIP_TARGET</ffdc>
<ffdc>CHIPLET_ID</ffdc>
<ffdc>SOURCE_LINK_ID</ffdc>
<ffdc>REGION_ENABLED</ffdc>
<ffdc>REGIONS_TO_ENABLE</ffdc>
<ffdc>REGIONS_TO_ENABLE_VALID</ffdc>
<ffdc>DEST_NODE_ID</ffdc>
<callout>
<target>SOURCE_CHIP_TARGET</target>
<priority>HIGH</priority>
</callout>
<callout>
<procedure>CODE</procedure>
<priority>MEDIUM</priority>
</callout>
<deconfigure>
<target>SOURCE_CHIP_TARGET</target>
</deconfigure>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_CORE_CEILING_RATIO_ERR</rc>
<description>Unsupported core ceiling frequency enumerated value.</description>
<ffdc>FREQ_PB</ffdc>
<ffdc>FREQ_CORE_CEILING</ffdc>
<ffdc>CORE_CEILING_RATIO</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_CORE_FLOOR_RATIO_ERR</rc>
<description>Unsupported core floor frequency enumerated value.</description>
<ffdc>FREQ_PB</ffdc>
<ffdc>FREQ_CORE_FLOOR</ffdc>
<ffdc>CORE_FLOOR_RATIO</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_INVALID_GROUP_SIZE_ERR</rc>
<description>Invalid chips per group configuration detected.</description>
<ffdc>TARGET</ffdc>
<ffdc>GROUP_SIZE</ffdc>
<ffdc>NODE_ID</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_PACING_RATE_TABLE_ERR</rc>
<description>Command rate pacing table lookup error.</description>
<ffdc>TARGET</ffdc>
<ffdc>GROUP_SIZE</ffdc>
<ffdc>NODE_ID</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
<hwpError>
<rc>RC_PROC_BUILD_SMP_INVALID_TOPOLOGY</rc>
<description>Invalid fabric topology specified by input parameters.</description>
<ffdc>TARGET</ffdc>
<ffdc>A_CONNECTIONS_OK</ffdc>
<ffdc>A_CONNECTED_NODE_IDS</ffdc>
<ffdc>X_CONNECTIONS_OK</ffdc>
<ffdc>X_CONNECTED_CHIP_IDS</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>HIGH</priority>
</callout>
</hwpError>
<!-- *********************************************************************** -->
</hwpErrors>
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