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path: root/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_XBUS.rule
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# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/pegasus/Proc_regs_XBUS.rule $
#
# OpenPOWER HostBoot Project
#
# COPYRIGHT International Business Machines Corp. 2012,2014
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
# implied. See the License for the specific language governing
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG

    ############################################################################
    # XBUS Chiplet Registers
    ############################################################################

    register XBUS_CHIPLET_CS_FIR
    {
        name        "EN.PB.TPC.XFIR";
        scomaddr    0x04040000;
        capture     group default;
    };

    register XBUS_CHIPLET_RE_FIR
    {
        name        "EN.PB.TPC.RFIR";
        scomaddr    0x04040001;
        capture     group default;
    };

    register XBUS_CHIPLET_FIR_MASK
    {
        name        "EN.PB.TPC.FIR_MASK";
        scomaddr    0x04040002;
        capture     group default;
    };

    ############################################################################
    # XBUS Chiplet LFIR
    ############################################################################

    register XBUS_LFIR
    {
        name        "EN.PB.TPC.LOCAL_FIR";
        scomaddr    0x0404000a;
        reset       (&, 0x0404000b);
        mask        (|, 0x0404000f);
        capture     group default;
    };

    register XBUS_LFIR_MASK
    {
        name        "EN.PB.TPC.EPS.FIR.LOCAL_FIR_MASK";
        scomaddr    0x0404000d;
        capture     group default;
    };

    register XBUS_LFIR_ACT0
    {
        name        "EN.PB.TPC.EPS.FIR.LOCAL_FIR_ACTION0";
        scomaddr    0x04040010;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("XBUS_LFIR");
    };

    register XBUS_LFIR_ACT1
    {
        name        "EN.PB.TPC.EPS.FIR.LOCAL_FIR_ACTION1";
        scomaddr    0x04040011;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("XBUS_LFIR");
    };

    ############################################################################
    # XBUS Chiplet PBENFIR
    ############################################################################

    register PBENFIR
    {
        name        "EN.PB.PBEN.MISC_IO.SCOM.FIR_REG";
        scomaddr    0x04010c00;
        reset       (&, 0x04010c01);
        mask        (|, 0x04010c05);
        capture     group default;
    };

    register PBENFIR_MASK
    {
        name        "EN.PB.PBEN.MISC_IO.SCOM.FIR_MASK_REG";
        scomaddr    0x04010c03;
        capture     group default;
    };

    register PBENFIR_ACT0
    {
        name        "EN.PB.PBEN.MISC_IO.SCOM.FIR_REG_ACTION0";
        scomaddr    0x04010c06;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBENFIR");
    };

    register PBENFIR_ACT1
    {
        name        "EN.PB.PBEN.MISC_IO.SCOM.FIR_REG_ACTION1";
        scomaddr    0x04010c07;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBENFIR");
    };

    ############################################################################
    # XBUS Chiplet IOXFIR_0 (Venice only)
    ############################################################################

   register IOXFIR_0
   {
        name        "XBUS01.X0.BUSCTL.SCOM.FIR_REG";
        scomaddr    0x04011000;
        reset       (&, 0x04011001);
        mask        (|, 0x04011005);
        capture     req funccall("isVeniceProc");
        capture     group default;
    };

    register IOXFIR_0_MASK
    {
        name        "XBUS01.X0.BUSCTL.SCOM.FIR_MASK_REG";
        scomaddr    0x04011003;
        capture     req funccall("isVeniceProc");
        capture     group default;
    };

    register IOXFIR_0_ACT0
    {
        name        "XBUS01.X0.BUSCTL.SCOM.FIR_ACTION0_REG";
        scomaddr    0x04011006;
        capture     type secondary;
        capture     req funccall("isVeniceProc");
        capture     req nonzero("IOXFIR_0");
        capture     group default;
    };

    register IOXFIR_0_ACT1
    {
        name        "XBUS01.X0.BUSCTL.SCOM.FIR_ACTION1_REG";
        scomaddr    0x04011007;
        capture     type secondary;
        capture     req funccall("isVeniceProc");
        capture     req nonzero("IOXFIR_0");
        capture     group default;
    };

    ############################################################################
    # XBUS Chiplet IOXFIR_1
    ############################################################################

    register IOXFIR_1
    {
        name        "XBUS01.X1.BUSCTL.SCOM.FIR_REG";
        scomaddr    0x04011400;
        reset       (&, 0x04011401);
        mask        (|, 0x04011405);
        capture     group default;
    };

    register IOXFIR_1_MASK
    {
        name        "XBUS01.X1.BUSCTL.SCOM.FIR_MASK_REG";
        scomaddr    0x04011403;
        capture     group default;
    };

    register IOXFIR_1_ACT0
    {
        name        "XBUS01.X1.BUSCTL.SCOM.FIR_ACTION0_REG";
        scomaddr    0x04011406;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("IOXFIR_1");
    };

    register IOXFIR_1_ACT1
    {
        name        "XBUS01.X1.BUSCTL.SCOM.FIR_ACTION1_REG";
        scomaddr    0x04011407;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("IOXFIR_1");
    };

    ############################################################################
    # XBUS Chiplet IOXFIR_2 (Venice only)
    ############################################################################

    register IOXFIR_2
    {
        name        "XBUS23.X0.BUSCTL.SCOM.FIR_REG";
        scomaddr    0x04011800;
        reset       (&, 0x04011801);
        mask        (|, 0x04011805);
        capture     req funccall("isVeniceProc");
        capture     group default;
    };

    register IOXFIR_2_MASK
    {
        name        "XBUS23.X0.BUSCTL.SCOM.FIR_MASK_REG";
        scomaddr    0x04011803;
        capture     req funccall("isVeniceProc");
        capture     group default;
    };

    register IOXFIR_2_ACT0
    {
        name        "XBUS23.X0.BUSCTL.SCOM.FIR_ACTION0_REG";
        scomaddr    0x04011806;
        capture     type secondary;
        capture     req funccall("isVeniceProc");
        capture     req nonzero("IOXFIR_2");
        capture     group default;
    };

    register IOXFIR_2_ACT1
    {
        name        "XBUS23.X0.BUSCTL.SCOM.FIR_ACTION1_REG";
        scomaddr    0x04011807;
        capture     type secondary;
        capture     req funccall("isVeniceProc");
        capture     req nonzero("IOXFIR_2");
        capture     group default;
    };

    ############################################################################
    # XBUS Chiplet IOXFIR_3 (Venice only)
    ############################################################################

    register IOXFIR_3
    {
        name        "XBUS23.X1.BUSCTL.SCOM.FIR_REG";
        scomaddr    0x04011c00;
        reset       (&, 0x04011c01);
        mask        (|, 0x04011c05);
        capture     req funccall("isVeniceProc");
        capture     group default;
    };

    register IOXFIR_3_MASK
    {
        name        "XBUS23.X1.XBUS1.BUSCTL.SCOM.FIR_MASK_REG";
        scomaddr    0x04011c03;
        capture     req funccall("isVeniceProc");
        capture     group default;
    };

    register IOXFIR_3_ACT0
    {
        name        "XBUS23.X1.XBUS1.BUSCTL.SCOM.FIR_ACTION0_REG";
        scomaddr    0x04011c06;
        capture     type secondary;
        capture     req funccall("isVeniceProc");
        capture     req nonzero("IOXFIR_3");
        capture     group default;
    };

    register IOXFIR_3_ACT1
    {
        name        "XBUS23.X1.XBUS1.BUSCTL.SCOM.FIR_ACTION1_REG";
        scomaddr    0x04011c07;
        capture     type secondary;
        capture     req funccall("isVeniceProc");
        capture     req nonzero("IOXFIR_3");
        capture     group default;
    };

    ############################################################################
    # XBUS Chiplet PSIXBUSFIR
    ############################################################################

    # All bits in this FIR are reserved so PRD is not expected to analyze this
    # FIR. Capture the FIR for FFDC, just in case.

    register PSIXBUSFIR
    {
        name        "PSI.PSI_MAC.PSI_SCOM.FIR_REG";
        scomaddr    0x04012400;
        capture     group default;
    };

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