path: root/src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule

# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/pegasus/Proc_regs_PB.rule $
#
# IBM CONFIDENTIAL
#
# COPYRIGHT International Business Machines Corp. 2012,2013
#
# p1
#
# Object Code Only (OCO) source materials
# Licensed Internal Code Source Materials
# IBM HostBoot Licensed Internal Code
#
# The source code for this program is not published or otherwise
# divested of its trade secrets, irrespective of what has been
# deposited with the U.S. Copyright Office.
#
# Origin: 30
#
# IBM_PROLOG_END_TAG

    ############################################################################
    # PB Chiplet Registers
    ############################################################################

    register PB_CHIPLET_CS_FIR
    {
        name        "EH.TPC.XFIR";
        scomaddr    0x02040000;
        capture     group default;
    };

    register PB_CHIPLET_RE_FIR
    {
        name        "EH.TPC.RFIR";
        scomaddr    0x02040001;
        capture     group default;
    };

    register PB_CHIPLET_FIR_MASK
    {
        name        "EH.TPC.FIR_MASK";
        scomaddr    0x02040002;
        capture     group default;
    };

    register PB_CHIPLET_SPA
    {
        name        "EH.TPC.EPS.FIR.SPATTN";
        scomaddr    0x02040004;
        capture     group default;
    };

    register PB_CHIPLET_SPA_MASK
    {
        name        "EH.TPC.EPS.FIR.SPA_MASK";
        scomaddr    0x02040007;
        capture     group default;
    };

    ############################################################################
    # PB Chiplet LFIR
    ############################################################################

    register PB_LFIR
    {
        name        "EH.TPC.LOCAL_FIR";
        scomaddr    0x0204000a;
        reset       (&, 0x0204000b);
        mask        (|, 0x0204000f);
        capture     group default;
    };

    register PB_LFIR_MASK
    {
        name        "EH.TPC.EPS.FIR.LOCAL_FIR_MASK";
        scomaddr    0x0204000d;
        capture     group default;
    };

    register PB_LFIR_ACT0
    {
        name        "EH.TPC.EPS.FIR.LOCAL_FIR_ACTION0";
        scomaddr    0x02040010;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PB_LFIR");
    };

    register PB_LFIR_ACT1
    {
        name        "EH.TPC.EPS.FIR.LOCAL_FIR_ACTION1";
        scomaddr    0x02040011;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PB_LFIR");
    };

    ############################################################################
    # PB Chiplet NXDMAENGFIR
    ############################################################################

    register NXDMAENGFIR
    {
        name        "EN.NX.DBG.NX_DMA_ENG_FIR";
        scomaddr    0x02013100;
        reset       (&, 0x02013101);
        mask        (|, 0x02013105);
        capture     group default;
    };

    register NXDMAENGFIR_MASK
    {
        name        "EN.NX.DBG.NX_DMA_ENG_FIR_MASK";
        scomaddr    0x02013103;
        capture     group default;
    };

    register NXDMAENGFIR_ACT0
    {
        name        "EN.NX.DBG.NX_DMA_ENG_FIR_ACTION0";
        scomaddr    0x02013106;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXDMAENGFIR");
    };

    register NXDMAENGFIR_ACT1
    {
        name        "EN.NX.DBG.NX_DMA_ENG_FIR_ACTION1";
        scomaddr    0x02013107;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXDMAENGFIR");
    };

    ############################################################################
    # PB Chiplet NXCQFIR
    ############################################################################

    register NXCQFIR
    {
        name        "EN.NX.PBI.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_REG";
        scomaddr    0x02013080;
        reset       (&, 0x02013081);
        mask        (|, 0x02013085);
        capture     group default;
    };

    register NXCQFIR_MASK
    {
        name        "EN.NX.PBI.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_MASK_REG";
        scomaddr    0x02013083;
        capture     group default;
    };

    register NXCQFIR_ACT0
    {
        name        "EN.NX.PBI.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_ACTION0_REG";
        scomaddr    0x02013086;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXCQFIR");
    };

    register NXCQFIR_ACT1
    {
        name        "EN.NX.PBI.CQ_WRAP.NXCQ_SCOM.NX_CQ_FIR_ACTION1_REG";
        scomaddr    0x02013087;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXCQFIR");
    };

    ############################################################################
    # PB Chiplet NXASFIR
    ############################################################################

    register NXASFIR
    {
        name        "EN.NX.AS.FIR_REG";
        scomaddr    0x020130c0;
        reset       (&, 0x020130c1);
        mask        (|, 0x020130c5);
        capture     group default;
    };

    register NXASFIR_MASK
    {
        name        "EN.NX.AS.FIR_MASK_REG";
        scomaddr    0x020130c3;
        capture     group default;
    };

    register NXASFIR_ACT0
    {
        name        "EN.NX.AS.FIR_ACTION0_REG";
        scomaddr    0x020130c6;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXASFIR");
    };

    register NXASFIR_ACT1
    {
        name        "EN.NX.AS.FIR_ACTION1_REG";
        scomaddr    0x020130c7;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXASFIR");
    };

    ############################################################################
    # PB Chiplet NXCXAFIR
    ############################################################################

    register NXCXAFIR
    {
        name        "EN.NX.CXA.CXA_XPT.XPT_SCOMFIR.FIR_REG";
        scomaddr    0x02013000;
        reset       (&, 0x02013001);
        mask        (|, 0x02013005);
        capture     group default;
    };

    register NXCXAFIR_MASK
    {
        name        "EN.NX.CXA.CXA_XPT.XPT_SCOMFIR.FIR_MASK_REG";
        scomaddr    0x02013003;
        capture     group default;
    };

    register NXCXAFIR_ACT0
    {
        name        "EN.NX.CXA.CXA_XPT.XPT_SCOMFIR.FIR_ACTION0_REG";
        scomaddr    0x02013006;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXCXAFIR");
    };

    register NXCXAFIR_ACT1
    {
        name        "EN.NX.CXA.CXA_XPT.XPT_SCOMFIR.FIR_ACTION1_REG";
        scomaddr    0x02013007;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("NXCXAFIR");
    };

    ############################################################################
    # PB Chiplet MCDFIR
    ############################################################################

    register MCDFIR
    {
        name        "EH.PB.MCD.MCDCTL.FIR_REG";
        scomaddr    0x02013400;
        reset       (&, 0x02013401);
        mask        (|, 0x02013405);
        capture     group default;
    };

    register MCDFIR_MASK
    {
        name        "EH.PB.MCD.MCDCTL.FIR_MASK_REG";
        scomaddr    0x02013403;
        capture     group default;
    };

    register MCDFIR_ACT0
    {
        name        "EH.PB.MCD.MCDCTL.FIR_ACTION0_REG";
        scomaddr    0x02013406;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("MCDFIR");
    };

    register MCDFIR_ACT1
    {
        name        "EH.PB.MCD.MCDCTL.FIR_ACTION1_REG";
        scomaddr    0x02013407;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("MCDFIR");
    };

    ############################################################################
    # PB Chiplet PBWESTFIR
    ############################################################################

    register PBWESTFIR
    {
        name        "EH.PB.MISC.PB_WEST_FIR_REG";
        scomaddr    0x02010c00;
        reset       (&, 0x02010c01);
        mask        (|, 0x02010c05);
        capture     group default;
    };

    register PBWESTFIR_MASK
    {
        name        "EH.PB.MISC.PB_WEST_FIR_MASK_REG";
        scomaddr    0x02010c03;
        capture     group default;
    };

    register PBWESTFIR_ACT0
    {
        name        "EH.PB.MISC.PB_WEST_FIR_ACTION0_REG";
        scomaddr    0x02010c06;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBWESTFIR");
    };

    register PBWESTFIR_ACT1
    {
        name        "EH.PB.MISC.PB_WEST_FIR_ACTION1_REG";
        scomaddr    0x02010c07;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBWESTFIR");
    };

    ############################################################################
    # PB Chiplet PBCENTFIR
    ############################################################################

    register PBCENTFIR
    {
        name        "EH.PB.MISC.PB_CENT_FIR_REG";
        scomaddr    0x02010c40;
        reset       (&, 0x02010c41);
        mask        (|, 0x02010c45);
        capture     group default;
    };

    register PBCENTFIR_MASK
    {
        name        "EH.PB.MISC.PB_CENT_FIR_MASK_REG";
        scomaddr    0x02010c43;
        capture     group default;
    };

    register PBCENTFIR_ACT1
    {
        name        "EH.PB.MISC.PB_CENT_FIR_ACTION1_REG";
        scomaddr    0x02010c47;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBCENTFIR");
    };

    register PBCENTFIR_ACT0
    {
        name        "EH.PB.MISC.PB_CENT_FIR_ACTION0_REG";
        scomaddr    0x02010c46;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBCENTFIR");
    };

    ############################################################################
    # PB Chiplet PBEASTFIR
    ############################################################################

    register PBEASTFIR
    {
        name        "EH.PB.MISC.PB_EAST_FIR_REG";
        scomaddr    0x02010c80;
        reset       (&, 0x02010c81);
        mask        (|, 0x02010c85);
        capture     group default;
    };

    register PBEASTFIR_MASK
    {
        name        "EH.PB.MISC.PB_EAST_FIR_MASK_REG";
        scomaddr    0x02010c83;
        capture     group default;
    };

    register PBEASTFIR_ACT0
    {
        name        "EH.PB.MISC.PB_EAST_FIR_ACTION0_REG";
        scomaddr    0x02010c86;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBEASTFIR");
    };

    register PBEASTFIR_ACT1
    {
        name        "EH.PB.MISC.PB_EAST_FIR_ACTION1_REG";
        scomaddr    0x02010c87;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBEASTFIR");
    };

    ############################################################################
    # PB Chiplet PBEXTFIR
    ############################################################################

    # External checkstop register - Used for FFDC only
    # Any attention generated from this FIR register indicates that there was a
    # checkstop attention raised on another chip. Currently, we do not do any
    # additional analysis in this FIR because we assume we will get an interrupt
    # from the offending chip. This FIR will set PB_CHIPLET_FIR[2] which is
    # currently ignored.

    register PBEXTFIR
    {
        name        "EH.PB.MISC.EXTFIR_REG";
        scomaddr    0x02010c6e;
        capture     group default;
    };

    ############################################################################
    # PB Chiplet PSIHBFIR
    ############################################################################

    register PSIHBFIR
    {
        name        "EN.TPC.PSIHB.PSIHB_FIR_REG";
        scomaddr    0x02010900;
        reset       (&, 0x02010901);
        mask        (|, 0x02010905);
        capture     group default;
    };

    register PSIHBFIR_MASK
    {
        name        "EN.TPC.PSIHB.PSIHB_FIR_MASK_REG";
        scomaddr    0x02010903;
        capture     group default;
    };

    register PSIHBFIR_ACT0
    {
        name        "EN.TPC.PSIHB.PSIHB_FIR_ACTION0_REG";
        scomaddr    0x02010906;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PSIFIR");
    };

    register PSIHBFIR_ACT1
    {
        name        "EN.TPC.PSIHB.PSIHB_FIR_ACTION1_REG";
        scomaddr    0x02010907;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PSIFIR");
    };

    ############################################################################
    # PB Chiplet ICPFIR
    ############################################################################

    register ICPFIR
    {
        name        "EN.TPC.INTP.SYNC_FIR_REG";
        scomaddr    0x020109c0;
        reset       (&, 0x020109c1);
        mask        (|, 0x020109c5);
        capture     group default;
    };

    register ICPFIR_MASK
    {
        name        "EN.TPC.INTP.SYNC_FIR_MASK_REG";
        scomaddr    0x020109c3;
        capture     group default;
    };

    register ICPFIR_ACT0
    {
        name        "EN.TPC.INTP.SYNC_FIR_ACTION0_REG";
        scomaddr    0x020109c6;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("ICPFIR");
    };

    register ICPFIR_ACT1
    {
        name        "EN.TPC.INTP.SYNC_FIR_ACTION1_REG";
        scomaddr    0x020109c7;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("ICPFIR");
    };

    ############################################################################
    # PB Chiplet PBAFIR
    ############################################################################

    register PBAFIR
    {
        name        "EN.TPC.PBA.PBAFIR";
        scomaddr    0x02010840;
        reset       (&, 0x02010841);
        mask        (|, 0x02010845);
        capture     group default;
    };

    register PBAFIR_MASK
    {
        name        "EN.TPC.PBA.PBAFIRMASK";
        scomaddr    0x02010843;
        capture     group default;
    };

    register PBAFIR_ACT0
    {
        name        "EN.TPC.PBA.PBAFIRACT0";
        scomaddr    0x02010846;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBAFIR");
    };

    register PBAFIR_ACT1
    {
        name        "EN.TPC.PBA.PBAFIRACT1";
        scomaddr    0x02010847;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PBAFIR");
    };

    ############################################################################
    # PB Chiplet EHHCAFIR
    ############################################################################

    register EHHCAFIR
    {
        name        "EH.TPC.HCA.EHHCA_FIR_REG";
        scomaddr    0x02010980;
        reset       (&, 0x02010981);
        mask        (|, 0x02010985);
        capture     group default;
    };

    register EHHCAFIR_MASK
    {
        name        "EH.TPC.HCA.EHHCA_FIR_MASK_REG";
        scomaddr    0x02010983;
        capture     group default;
    };

    register EHHCAFIR_ACT0
    {
        name        "EH.TPC.HCA.EHHCA_FIR_ACTION0_REG";
        scomaddr    0x02010986;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("EHHCAFIR");
    };

    register EHHCAFIR_ACT1
    {
        name        "EH.TPC.HCA.EHHCA_FIR_ACTION1_REG";
        scomaddr    0x02010987;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("EHHCAFIR");
    };

    ############################################################################
    # PB Chiplet ENHCAFIR
    ############################################################################

    register ENHCAFIR
    {
        name        "EN.TPC.BRIDGE.HCA.ENHCA_FIR_REG";
        scomaddr    0x02010940;
        reset       (&, 0x02010941);
        mask        (|, 0x02010945);
        capture     group default;
    };

    register ENHCAFIR_MASK
    {
        name        "EN.TPC.BRIDGE.HCA.ENHCA_FIR_MASK_REG";
        scomaddr    0x02010943;
        capture     group default;
    };

    register ENHCAFIR_ACT0
    {
        name        "EN.TPC.BRIDGE.HCA.ENHCA_FIR_ACTION0_REG";
        scomaddr    0x02010946;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("ENHCAFIR");
    };

    register ENHCAFIR_ACT1
    {
        name        "EN.TPC.BRIDGE.HCA.ENHCA_FIR_ACTION1_REG";
        scomaddr    0x02010947;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("ENHCAFIR");
    };

    ############################################################################
    # PB Chiplet PCINESTFIR_0
    ############################################################################

    register PCINESTFIR_0
    {
        name        "ES.PE_WRAP_TOP.PE0.PEPBCQ.PBCQ.FIR_REG";
        scomaddr    0x02012000;
        reset       (&, 0x02012001);
        mask        (|, 0x02012005);
        capture     group default;
    };

    register PCINESTFIR_0_MASK
    {
        name        "ES.PE_WRAP_TOP.PE0.PEPBCQ.PBCQ.FIR_MASK_REG";
        scomaddr    0x02012003;
        capture     group default;
    };

    register PCINESTFIR_0_ACT0
    {
        name        "ES.PE_WRAP_TOP.PE0.PEPBCQ.PBCQ.FIR_ACTION0_REG";
        scomaddr    0x02012006;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PCINESTFIR_0");
    };

    register PCINESTFIR_0_ACT1
    {
        name        "ES.PE_WRAP_TOP.PE0.PEPBCQ.PBCQ.FIR_ACTION1_REG";
        scomaddr    0x02012007;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PCINESTFIR_0");
    };

    ############################################################################
    # PB Chiplet PCINESTFIR_1
    ############################################################################

    register PCINESTFIR_1
    {
        name        "ES.PE_WRAP_TOP.PE1.PEPBCQ.PBCQ.FIR_REG";
        scomaddr    0x02012400;
        reset       (&, 0x02012401);
        mask        (|, 0x02012405);
        capture     group default;
    };

    register PCINESTFIR_1_MASK
    {
        name        "ES.PE_WRAP_TOP.PE1.PEPBCQ.PBCQ.FIR_MASK_REG";
        scomaddr    0x02012403;
        capture     group default;
    };

    register PCINESTFIR_1_ACT0
    {
        name        "ES.PE_WRAP_TOP.PE1.PEPBCQ.PBCQ.FIR_ACTION0_REG";
        scomaddr    0x02012406;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PCINESTFIR_1");
    };

    register PCINESTFIR_1_ACT1
    {
        name        "ES.PE_WRAP_TOP.PE1.PEPBCQ.PBCQ.FIR_ACTION1_REG";
        scomaddr    0x02012407;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PCINESTFIR_1");
    };

    ############################################################################
    # PB Chiplet PCINESTFIR_2
    ############################################################################

    register PCINESTFIR_2
    {
        name        "ES.PE_WRAP_TOP.PE2.PEPBCQ.PBCQ.FIR_REG";
        scomaddr    0x02012800;
        reset       (&, 0x02012801);
        mask        (|, 0x02012805);
        capture     group default;
    };

    register PCINESTFIR_2_MASK
    {
        name        "ES.PE_WRAP_TOP.PE2.PEPBCQ.PBCQ.FIR_MASK_REG";
        scomaddr    0x02012803;
        capture     group default;
    };

    register PCINESTFIR_2_ACT0
    {
        name        "ES.PE_WRAP_TOP.PE2.PEPBCQ.PBCQ.FIR_ACTION0_REG";
        scomaddr    0x02012806;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PCINESTFIR_2");
    };

    register PCINESTFIR_2_ACT1
    {
        name        "ES.PE_WRAP_TOP.PE2.PEPBCQ.PBCQ.FIR_ACTION1_REG";
        scomaddr    0x02012807;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("PCINESTFIR_2");
    };

    ############################################################################
    # PB Chiplet IOMCFIR_0
    ############################################################################

    # Venice only scomaddr = 0x02011A00

    ############################################################################
    # PB Chiplet IOMCFIR_1
    ############################################################################

    register IOMCFIR_1
    {
        name        "IOMC1.BUSCTL.SCOM.FIR_REG";
        scomaddr    0x02011E00;
        reset       (&, 0x02011E01);
        mask        (|, 0x02011E05);
        capture     group default;
    };

    register IOMCFIR_1_MASK
    {
        name        "IOMC1.BUSCTL.SCOM.FIR_MASK_REG";
        scomaddr    0x02011E03;
        capture     group default;
    };

    register IOMCFIR_1_ACT0
    {
        name        "IOMC1.BUSCTL.SCOM.FIR_ACTION0_REG";
        scomaddr    0x02011E06;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("IOMCFIR_1");
    };

    register IOMCFIR_1_ACT1
    {
        name        "IOMC1.BUSCTL.SCOM.FIR_ACTION1_REG";
        scomaddr    0x02011E07;
        capture     type secondary;
        capture     group default;
        capture     req nonzero("IOMCFIR_1");
    };