path: root/src/usr/diag/prdf/common/plat/pegasus/Proc.rule

# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/pegasus/Proc.rule $
#
# IBM CONFIDENTIAL
#
# COPYRIGHT International Business Machines Corp. 2012,2014
#
# p1
#
# Object Code Only (OCO) source materials
# Licensed Internal Code Source Materials
# IBM HostBoot Licensed Internal Code
#
# The source code for this program is not published or otherwise
# divested of its trade secrets, irrespective of what has been
# deposited with the U.S. Copyright Office.
#
# Origin: 30
#
# IBM_PROLOG_END_TAG

################################################################################
#
# Scope:
#   Registers and actions for the following chiplets:
#
# Chiplet  Register Adddresses      Description
# =======  =======================  ============================================
#   TP     0x01000000 - 0x01FFFFFF  TP pervasive logic
#   PB     0x02000000 - 0x02FFFFFF  PB pervasive logic, note that this does
#                                   include the SCOM addresses characterized by
#                                   the MCS target. See Mcs.rule for those
#                                   address ranges.
#  XBUS    0x04000000 - 0x0400FFFF  XBUS pervasive logic
#  ABUS    0x08000000 - 0x0800FFFF  ABUS pervasive logic
#  PCIE    0x09000000 - 0x09FFFFFF  PCIE pervasive logic
#
################################################################################

chip Proc
{
    name        "Power8 Chip";
    targettype  TYPE_PROC;
    sigoff      0x8000;
    dump        DUMP_CONTENT_HW;
    scomlen     64;


# Include Extra signatures
.include "prdfP8ProcMbCommonExtraSig.H";

 #############################################################################
 #                                                                           #
 #  ######                                                                   #
 #  #     #  ######   ####     ###    ####    #####  ######  #####    ####   #
 #  #     #  #       #    #     #    #          #    #       #    #  #       #
 #  ######   #####   #          #     ####      #    #####   #    #   ####   #
 #  #   #    #       #  ###     #         #     #    #       #####        #  #
 #  #    #   #       #    #     #    #    #     #    #       #   #   #    #  #
 #  #     #  ######   ####     ###    ####      #    ######  #    #   ####   #
 #                                                                           #
 #############################################################################

    ############################################################################
    # Global Broadcast Registers
    ############################################################################

    register GLOBAL_CS_FIR
    {
        name        "Global Checkstop Attention FIR";
        scomaddr    0x570F001C;
        capture     group default;
    };

    register GLOBAL_RE_FIR
    {
        name        "Global Recoverable Attention FIR";
        scomaddr    0x570F001B;
        capture     group default;
    };

    register GLOBAL_SPA
    {
        name        "Global Special Attention FIR";
        scomaddr    0x570F001A;
        capture     group default;
    };

    register GLOBALUNITXSTPFIR
    {
        name        "Virtual Global Unit Checkstop FIR";
        scomaddr    0x51040001;
        capture     group default;
        capture     req funccall("CoreConfiguredAndNotHostboot");
    };

# Import all of the chiplet registers
.include "Proc_regs_TP.rule"
.include "Proc_regs_PB.rule"
.include "Proc_regs_XBUS.rule"
.include "Proc_regs_ABUS.rule"
.include "Proc_regs_PCIE.rule"

    ########################################################################
    #   Non-existent Registers for Capture
    ########################################################################
    register VPD_FAILED_LANES_0TO63
    {
        name        "Bit map 0-63 of failed lanes read from VPD";
        scomaddr    0xFFFF0001;
        access      no_access;
        capture     group never;
    };

    register VPD_FAILED_LANES_64TO127
    {
        name        "Bit map 64-127 of failed lanes read from VPD";
        scomaddr    0xFFFF0002;
        access      no_access;
        capture     group never;
    };

    register ALL_FAILED_LANES_0TO63
    {
        name        "Bit map 0-63 of failed lanes from io_read_erepair";
        scomaddr    0xFFFF0003;
        access      no_access;
        capture     group never;
    };

    register ALL_FAILED_LANES_64TO127
    {
        name        "Bit map 64-127 of failed lanes from io_read_erepair";
        scomaddr    0xFFFF0004;
        access      no_access;
        capture     group never;
    };

    ############################################################################
    # Non-FIR Registers
    ############################################################################

    register TODWOF
    {
        name        "Time of Day / WOF Counter";
        scomaddr    0x00040020;
        capture     group default;
    };

    ############################################################################
    # PLL Registers
    ############################################################################

    register CFAM_FSI_STATUS
    {
        name        "TPC.FSI.FSI2PIB.STATUS";
        scomaddr    0x00001007;
        capture     group never;
    };

};

 ##############################################################################
 #                                                                            #
 # ####                                 #                                     #
 # #   # #   # #    #####  ###      #  # #    ##  ##### ###  ###  #   #  ###  #
 # #   # #   # #    #     #        #  #   #  #  #   #    #  #   # ##  # #     #
 # ####  #   # #    ####   ###    #  ####### #      #    #  #   # # # #  ###  #
 # #  #  #   # #    #         #  #   #     # #  #   #    #  #   # #  ##     # #
 # #   #  ###  #### #####  ###  #    #     #  ##    #   ###  ###  #   #  ###  #
 #                                                                            #
 ##############################################################################

################################################################################
# Global Broadcast Registers
################################################################################

rule GlobalFir
{
    CHECK_STOP:  GLOBAL_CS_FIR;
    RECOVERABLE: GLOBAL_RE_FIR;
};

group gGlobalFir attntype CHECK_STOP, RECOVERABLE filter singlebit
{
    /** GLOBAL_FIR[1]
     *  Attention from TP chiplet
     */
    (GlobalFir, bit(1)) ? analyze(gTpChipletFir);

    /** GLOBAL_FIR[2]
     *  Attention from PB chiplet
     */
    (GlobalFir, bit(2)) ? analyze(gPbChipletFir);

    /** GLOBAL_FIR[4]
     *  Attention from XBUS chiplet
     */
    (GlobalFir, bit(4)) ? analyze(gXbusChipletFir);

    /** GLOBAL_FIR[8]
     *  Attention from ABUS chiplet
     */
    (GlobalFir, bit(8)) ? analyze(gAbusChipletFir);

    /** GLOBAL_FIR[9]
     *  Attention from PCIE
     */
    (GlobalFir, bit(9)) ? analyze(gPcieChipletFir);

    /** GLOBAL_FIR[17]
     *  Attention from EX1 (Venice only)
     */
    (GlobalFir, bit(17)) ? analyzeEx1;

    /** GLOBAL_FIR[18]
     *  Attention from EX2 (Venice only)
     */
    (GlobalFir, bit(18)) ? analyzeEx2;

    /** GLOBAL_FIR[19]
     *  Attention from EX3 (Venice only)
     */
    (GlobalFir, bit(19)) ? analyzeEx3;

    /** GLOBAL_FIR[20]
     *  Attention from EX4
     */
    (GlobalFir, bit(20)) ? analyzeEx4;

    /** GLOBAL_FIR[21]
     *  Attention from EX5
     */
    (GlobalFir, bit(21)) ? analyzeEx5;

    /** GLOBAL_FIR[22]
     *  Attention from EX6
     */
    (GlobalFir, bit(22)) ? analyzeEx6;

    /** GLOBAL_FIR[25]
     *  Attention from EX9 (Venice only)
     */
    (GlobalFir, bit(25)) ? analyzeEx9;

    /** GLOBAL_FIR[26]
     *  Attention from EX10 (Venice only)
     */
    (GlobalFir, bit(26)) ? analyzeEx10;

    /** GLOBAL_FIR[27]
     *  Attention from EX11 (Venice only)
     */
    (GlobalFir, bit(27)) ? analyzeEx11;

    /** GLOBAL_FIR[28]
     *  Attention from EX12
     */
    (GlobalFir, bit(28)) ? analyzeEx12;

    /** GLOBAL_FIR[29]
     *  Attention from EX13
     */
    (GlobalFir, bit(29)) ? analyzeEx13;

    /** GLOBAL_FIR[30]
     *  Attention from EX14
     */
    (GlobalFir, bit(30)) ? analyzeEx14;
};

rule GlobalSpa
{
    SPECIAL: GLOBAL_SPA;
};

group gGlobalSpa attntype SPECIAL filter singlebit
{
    /** GLOBAL_SPA[1]
     *  Attention from TP chiplet
     */
    (GlobalSpa, bit(1)) ? analyze(gTpChipletSpa);

    /** GLOBAL_SPA[2]
     *  Attention from PB chiplet
     */
    (GlobalSpa, bit(2)) ? analyze(gPbChipletSpa);

    /** GLOBAL_SPA[9]
     *  Attention from PCIE
     */
    (GlobalSpa, bit(9)) ? analyze(gPcieChipletSpa);

    /** GLOBAL_SPA[11]
     *  Attention from EX1 (Venice only)
     */
    (GlobalSpa, bit(11)) ? analyzeEx1;

    /** GLOBAL_SPA[12]
     *  Attention from EX2 (Venice only)
     */
    (GlobalSpa, bit(12)) ? analyzeEx2;

    /** GLOBAL_SPA[13]
     *  Attention from EX3 (Venice only)
     */
    (GlobalSpa, bit(13)) ? analyzeEx3;

    /** GLOBAL_SPA[14]
     *  Attention from EX4
     */
    (GlobalSpa, bit(14)) ? analyzeEx4;

    /** GLOBAL_SPA[15]
     *  Attention from EX5
     */
    (GlobalSpa, bit(15)) ? analyzeEx5;

    /** GLOBAL_SPA[16]
     *  Attention from EX6
     */
    (GlobalSpa, bit(16)) ? analyzeEx6;

    /** GLOBAL_SPA[19]
     *  Attention from EX9 (Venice only)
     */
    (GlobalSpa, bit(19)) ? analyzeEx9;

    /** GLOBAL_SPA[20]
     *  Attention from EX10 (Venice only)
     */
    (GlobalSpa, bit(20)) ? analyzeEx10;

    /** GLOBAL_SPA[21]
     *  Attention from EX11 (Venice only)
     */
    (GlobalSpa, bit(21)) ? analyzeEx11;

    /** GLOBAL_SPA[22]
     *  Attention from EX12
     */
    (GlobalSpa, bit(22)) ? analyzeEx12;

    /** GLOBAL_SPA[23]
     *  Attention from EX13
     */
    (GlobalSpa, bit(23)) ? analyzeEx13;

    /** GLOBAL_SPA[24]
     *  Attention from EX14
     */
    (GlobalSpa, bit(24)) ? analyzeEx14;
};

# Import all of the chiplet rules and actions
# NOTE: Some of PB local FIRs are handled through the TP chiplet FIRs
.include "Proc_acts_TP.rule"
.include "Proc_acts_PB.rule"
.include "Proc_acts_XBUS.rule"
.include "Proc_acts_ABUS.rule"
.include "Proc_acts_PCIE.rule"

 ##############################################################################
 #                                                                            #
 #    #                                  ###                                  #
 #   # #    ##  ##### ###  ###  #   #   #   # #     #    ###   ###  ###  ###  #
 #  #   #  #  #   #    #  #   # ##  #   #     #    # #  #     #     #   #     #
 # ####### #      #    #  #   # # # #   #     #   #####  ###   ###  ##   ###  #
 # #     # #  #   #    #  #   # #  ##   #   # #   #   #     #     # #       # #
 # #     #  ##    #   ###  ###  #   #    ###  ### #   #  ###   ###  ###  ###  #
 #                                                                            #
 ##############################################################################

# Include the common action set.
.include "CommonActions.rule"

################################################################################
#                          Analyze Connected Parts                             #
################################################################################

/** Analyze connected EX1 */
actionclass analyzeEx1 { analyze(connected(TYPE_EX, 1)); };

/** Analyze connected EX2 */
actionclass analyzeEx2 { analyze(connected(TYPE_EX, 2)); };

/** Analyze connected EX3 */
actionclass analyzeEx3 { analyze(connected(TYPE_EX, 3)); };

/** Analyze connected EX4 */
actionclass analyzeEx4 { analyze(connected(TYPE_EX, 4)); };

/** Analyze connected EX5 */
actionclass analyzeEx5 { analyze(connected(TYPE_EX, 5)); };

/** Analyze connected EX6 */
actionclass analyzeEx6 { analyze(connected(TYPE_EX, 6)); };

/** Analyze connected EX9 */
actionclass analyzeEx9 { analyze(connected(TYPE_EX, 9)); };

/** Analyze connected EX10 */
actionclass analyzeEx10 { analyze(connected(TYPE_EX, 10)); };

/** Analyze connected EX11 */
actionclass analyzeEx11 { analyze(connected(TYPE_EX, 11)); };

/** Analyze connected EX12 */
actionclass analyzeEx12 { analyze(connected(TYPE_EX, 12)); };

/** Analyze connected EX13 */
actionclass analyzeEx13 { analyze(connected(TYPE_EX, 13)); };

/** Analyze connected EX14 */
actionclass analyzeEx14 { analyze(connected(TYPE_EX, 14)); };

actionclass calloutProcLevel2MedThr1
{
    calloutSelfLow;
    callout2ndLvlMed;
    threshold1;
};

/** callout Proc with low priority ,Sec level Med priority, Thr1
 *  and dump type SH, garding not done */
actionclass calloutProcLevel2MedThr1dumpShNoGard
{
    calloutProcLevel2MedThr1;
    dumpSH;
    gard(NoGard);
};

/** callout Proc with low priority ,Sec level Med priority, Thr 32per day
 *  and dump type SH , garding not done */
actionclass calloutProcLevel2MedThr32dumpShNoGard
{
    calloutSelfLow;
    callout2ndLvlMed;
    threshold32pday;
    dumpSH;
    gard(NoGard);
};

actionclass calloutProcHighThr1SUE
{
    calloutSelfHigh;
    SUEGenerationPoint;
    threshold1;
};