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# IBM_PROLOG_BEGIN_TAG
# This is an automatically generated prolog.
#
# $Source: src/usr/diag/prdf/common/plat/p9/p9_common_obus_regs.rule $
#
# OpenPOWER HostBoot Project
#
# Contributors Listed Below - COPYRIGHT 2016,2018
# [+] International Business Machines Corp.
#
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
# implied. See the License for the specific language governing
# permissions and limitations under the License.
#
# IBM_PROLOG_END_TAG
register IOOLFIR_AND
{
name "P9 chip IOOLFIR atomic AND";
scomaddr 0x09010801;
capture group never;
access write_only;
};
register IOOLFIR_MASK_OR
{
name "P9 chip IOOLFIR atomic OR";
scomaddr 0x09010805;
capture group never;
access write_only;
};
register OBUS_ERROR_REG
{
name "OBUS PCB Slave error reg";
scomaddr 0x090F001F;
capture group PllFIRs;
};
register OBUS_CONFIG_REG
{
name "OBUS PCB Slave config reg";
scomaddr 0x090F001E;
capture group PllFIRs;
};
############################################################################
# P9 OBUS target HDCT additions (open power chkstop analysis)
############################################################################
register PBOLL_LINK0_ERRSTAT
{
name "P9 OBUS target PB OLL Link0 ErrStatus";
scomaddr 0x09010816;
capture group default;
};
register PBOLL_LINK1_ERRSTAT
{
name "P9 OBUS target PB OLL Link1 ErrStatus";
scomaddr 0x09010817;
capture group default;
};
register LINK_STATUS_REG0
{
name "P9 OBUS target Link0 Quality Status register";
scomaddr 0x09010826;
capture group default;
};
register LINK_STATUS_REG1
{
name "P9 OBUS target Link1 Quality Status register";
scomaddr 0x09010827;
capture group default;
};
############################################################################
# P9 OBUS targets for cable FFDC
# One additional reg (IOOLFIR) is in default group
############################################################################
register OLL0_XMITLANE_CTL
{
name "P9 OBUS target OLL LINK0 TRANSMIT LANE CTL";
scomaddr 0x09010810;
capture group smpCableFFDC;
};
register OLL1_XMITLANE_CTL
{
name "P9 OBUS target OLL LINK1 TRANSMIT LANE CTL";
scomaddr 0x09010811;
capture group smpCableFFDC;
};
register OLL0_RECVLANE_CTL
{
name "P9 OBUS target OLL LINK0 RECEIVE LANE CTL";
scomaddr 0x09010812;
capture group smpCableFFDC;
};
register OLL1_RECVLANE_CTL
{
name "P9 OBUS target OLL LINK1 RECEIVE LANE CTL";
scomaddr 0x09010813;
capture group smpCableFFDC;
};
register OLL0_INFO_REG
{
name "P9 OBUS target OLL LINK0 INFORMATION REG";
scomaddr 0x09010814;
capture group smpCableFFDC;
};
register OLL1_INFO_REG
{
name "P9 OBUS target OLL LINK1 INFORMATION REG";
scomaddr 0x09010815;
capture group smpCableFFDC;
};
register OLL0_ERROR_STATUS_REG
{
name "P9 OBUS target OLL LINK0 ERROR STATUS";
scomaddr 0x09010816;
capture group smpCableFFDC;
};
register OLL1_ERROR_STATUS_REG
{
name "P9 OBUS target OLL LINK1 ERROR STATUS";
scomaddr 0x09010817;
capture group smpCableFFDC;
};
register OLL_REPLAY_THRESHOLD_REG
{
name "P9 OBUS target OLL REPLAY THRESHOLD";
scomaddr 0x09010818;
capture group smpCableFFDC;
};
register OLL_SLECC_THRESHOLD_REG
{
name "P9 OBUS target OLL SL ECC THRESHOLD";
scomaddr 0x09010819;
capture group smpCableFFDC;
};
register OLL0_SYNDROME_CAP_REG
{
name "P9 OBUS target OLL LINK0 SYNDROME CAPTURE";
scomaddr 0x09010822;
capture group smpCableFFDC;
};
register OLL1_SYNDROME_CAP_REG
{
name "P9 OBUS target OLL LINK1 SYNDROME CAPTURE";
scomaddr 0x09010823;
capture group smpCableFFDC;
};
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