1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
|
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/usr/diag/prdf/common/plat/mem/prdfMemEccAnalysis.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2016,2017 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
#ifndef __prdfMemEccAnalysis_H
#define __prdfMemEccAnalysis_H
// Framework includes
#include <iipServiceDataCollector.h>
#include <prdfExtensibleChip.H>
// Platform includes
#include <prdfMemRank.H>
#include <prdfPlatServices.H>
#include <prdfMemMark.H>
#ifdef __HOSTBOOT_MODULE
#include <prdfMemTps.H>
#include <prdfMemVcm.H>
#include <prdfP9McbistDataBundle.H>
#endif
namespace PRDF
{
namespace MemEcc
{
/**
* @brief Adds the memory CE to the callout list and CE table. Will also issue
* dynamic memory deallocation when appropriate. Returns true if TPS is
* required.
* @param i_chip MCA or MBA.
* @param i_addr Failed address.
* @param i_symbol Failed symbol.
* @param o_doTps True if TPS is required. False otherwise.
* @param io_sc The step code data struct.
* @param i_isHard True if this is a hard CE. Default is false.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t handleMemCe( ExtensibleChip * i_chip, const MemAddr & i_addr,
const MemSymbol & i_symbol, bool & o_doTps,
STEP_CODE_DATA_STRUCT & io_sc, bool i_isHard = false );
/**
* @brief Adds the memory UE to the callout list and UE table. Makes the error
* log predictive. Will also issue dynamic memory deallocation when
* appropriate.
*
* For UEs on Nimbus chips, it is possible that this UE is a side-effect of
* DDRPHY attentions. If so, the MCA will be added to the callout list instead
* of the DIMMs, the UE table will not be updated and no dynamic memory
* deallocation.
*
* @param i_chip MCA or MBA.
* @param i_addr Failed address.
* @param i_type The type of UE.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T>
uint32_t handleMemUe( ExtensibleChip * i_chip, const MemAddr & i_addr,
UE_TABLE::Type i_type, STEP_CODE_DATA_STRUCT & io_sc );
/**
* @brief Does mainline and maintenance IUE handling.
*
* Adds the memory IUE to the callout list. At threshold, will make the error
* log predictive. When threshold is reached at runtime there is a good chance
* these IUEs are going to lead to a data integrity issue. Therefore, the port
* will be forced to fail, the entire port will be masked off, and dynamic
* memory deallocation will be applied. Note that this function will not issue
* the port failure because it is possible that it may crash the host. Instead,
* the port failure is issued in the PostAnalysis plugin after the error log has
* been committed.
*
* @param i_chip MCA chip.
* @param i_rank Rank containing the IUE.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t handleMemIue( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc );
/**
* @brief Handles a MPE attention.
* @param i_chip MCA or MBA.
* @param i_rank Target rank.
* @param io_sc The step code data struct.
* @param i_isFetch Whether this is a fetch attn or not.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t handleMpe( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc, bool i_isFetch = false );
/**
* @brief Analyzes a fetch MPE attention.
* @param i_chip MCA or MBA.
* @param i_rank Target rank.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t analyzeFetchMpe( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc );
/**
* @brief Analyzes a fetch NCE/TCE attention.
* @param i_chip MCA or MBA.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t analyzeFetchNceTce( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
/**
* @brief Analyzes a fetch UE attention.
* @param i_chip MCA or MBA.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t analyzeFetchUe( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
/**
* @brief Analyzes a fetch mainline IUE attention.
* @param i_chip MCA or MBA.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t analyzeMainlineIue( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
/**
* @brief Analyzes a fetch maint IUE attention.
* @param i_chip MCA or MBA.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an interal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t analyzeMaintIue( ExtensibleChip * i_chip,
STEP_CODE_DATA_STRUCT & io_sc );
/**
* @brief Analyzes a maint or mainline IMPE attention.
* @param i_chip MCA or MBA.
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an internal function fails, SUCCESS otherwise.
*/
template<TARGETING::TYPE T, typename D>
uint32_t analyzeImpe( ExtensibleChip * i_chip, STEP_CODE_DATA_STRUCT & io_sc );
#ifdef __HOSTBOOT_RUNTIME
/**
* @brief Will trigger a port fail if the number of IUEs is over threshold.
* @param i_chip MCA chip
* @param io_sc The step code data struct.
* @return Non-SUCCESS if an internal function fails, SUCCESS otherwise
*/
template<TARGETING::TYPE T>
uint32_t iuePortFail( ExtensibleChip * i_chip, STEP_CODE_DATA_STRUCT & io_sc );
#endif // __HOSTBOOT_RUNTIME
#ifdef __HOSTBOOT_MODULE
/**
* @brief Will mask off an entire memory port. At runtime will issue dynamic
* memory deallocation of the port.
* @param i_chip MCA chip
* @return Non-SUCCESS if an internal function fails, SUCCESS otherwise
*/
template<TARGETING::TYPE T>
uint32_t maskMemPort( ExtensibleChip * i_chip );
template<TARGETING::TYPE T, typename D>
uint32_t addVcmEvent( ExtensibleChip * i_chip, const MemRank & i_rank,
const MemMark & i_mark, STEP_CODE_DATA_STRUCT & io_sc,
bool i_isFetch = false );
template<TARGETING::TYPE T, typename D>
uint32_t addTpsEvent( ExtensibleChip * i_chip, const MemRank & i_rank,
STEP_CODE_DATA_STRUCT & io_sc, bool i_banTps = false );
#endif
} // end namespace MemEcc
} // end namespace PRDF
#endif // __prdfMemEccAnalysis_H
|