summaryrefslogtreecommitdiffstats
path: root/src/include/sys/misc.h
blob: 6ccde7882c3c4e17367dfde744f613974da54224 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
/* IBM_PROLOG_BEGIN_TAG                                                   */
/* This is an automatically generated prolog.                             */
/*                                                                        */
/* $Source: src/include/sys/misc.h $                                      */
/*                                                                        */
/* IBM CONFIDENTIAL                                                       */
/*                                                                        */
/* COPYRIGHT International Business Machines Corp. 2011,2014              */
/*                                                                        */
/* p1                                                                     */
/*                                                                        */
/* Object Code Only (OCO) source materials                                */
/* Licensed Internal Code Source Materials                                */
/* IBM HostBoot Licensed Internal Code                                    */
/*                                                                        */
/* The source code for this program is not published or otherwise         */
/* divested of its trade secrets, irrespective of what has been           */
/* deposited with the U.S. Copyright Office.                              */
/*                                                                        */
/* Origin: 30                                                             */
/*                                                                        */
/* IBM_PROLOG_END_TAG                                                     */
#ifndef __SYS_MISC_H
#define __SYS_MISC_H

#include <stdint.h>

/**
 *  @enum   p8SystemConsts
 *
 *  system-wide constants:
 *  - please add as necessary
 *
 */

enum    p8SystemConsts
{
    /// max possible processors in a P8 system
    P8_MAX_PROCS        =   8,
    /// max EX (cores available in a processor )
    P8_MAX_EX_PER_PROC  =   16,

};


/**
 * @enum ShutdownStatus
 *
 * Shutdown values for shutdown command.
 */

enum ShutdownStatus
{
    SHUTDOWN_STATUS_GOOD                = 0x01230000,
    SHUTDOWN_STATUS_UT_FAILED           = 0x01230001,
    SHUTDOWN_STATUS_ISTEP_FAILED        = 0x01230002,
    SHUTDOWN_STATUS_EXTINITSVC_FAILED   = 0x01230003,
    SHUTDOWN_STATUS_INITSVC_FAILED      = 0x01230004,
};

/**
 * @enum WinkleScopes
 *
 * Scope of the winkle operation.
 */
enum WinkleScope
{
    WINKLE_SCOPE_MASTER = 0x0,
    WINKLE_SCOPE_ALL = 0x1,
};

/**
 * HOMER layout offsets
 * see: HOMER_Image_Layout.odt
 */
/** OCC image is at the start of the HOMER layout */
#define HOMER_OFFSET_TO_OCC_IMG 0
/** Offset from HOMER to OCC Host Data Area */
#define HOMER_OFFSET_TO_OCC_HOST_DATA (MEGABYTE)
/** SLW image is 2MB into the HOMER layout */
#define HOMER_SLW_IMG_OFFSET (2*MEGABYTE)
/** SLW Image Max ouput size */
#define HOMER_MAX_SLW_IMG_SIZE_IN_MB 1


#ifdef __cplusplus
extern "C"
{
#endif

#ifdef __HIDDEN_SYSCALL_SHUTDOWN
/** @fn shutdown()
 *  @brief Shutdown all CPUs (hardware threads)
 *  @param[in] i_status         The status code to post
 *  @param[in] i_payload_base   The base address (target HRMOR) of the payload.
 *  @param[in] i_payload_entry  The offset from base address of the payload
 *                              entry-point.
 *  @param[in] i_payload_data   Data pointer fo the payload.  For standalone
 *                              Saphire this is the devtree
 *  @param[in[ i_masterHBInstance  Hostboot instance number. for multinode
 */
extern "C" void shutdown(uint64_t i_status,
                         uint64_t i_payload_base,
                         uint64_t i_payload_entry,
                         uint64_t i_payload_data,
                         uint64_t i_masterHBInstance);
#endif

/** @enum ProcessorCoreType
 *  @brief Enumeration of the different supported processor cores.
 */
enum ProcessorCoreType
{
    /** Power8 "Murano" (low-end) core */
    CORE_POWER8_MURANO,
    /** Power8 "Venice" (high-end) core */
    CORE_POWER8_VENICE,

    CORE_UNKNOWN,
};

/** @fn cpu_core_type()
 *  @brief Determine the procesore core type.
 *
 *  @return ProcessorCoreType - Value from enumeration for this core.
 */
ProcessorCoreType cpu_core_type();

/** @fn cpu_dd_level()
 *  @brief Determine the processor DD level.
 *
 *  @return 1 byte DD level as <major nibble, minor nibble>.
 */
uint8_t cpu_dd_level();

/** @fn cpu_thread_count()
 *  @brief Get the number of available threads per cpu for this proctype
 *  @return # of threads per cpu
 */
size_t cpu_thread_count();

/** @fn cpu_start_core
 *  @brief Have the kernel start a new core.
 *
 *  @param[in] pir - PIR value of the first thread on the core.
 *  @param[in] i_threads - Bitstring of threads to enable (left-justified).
 *
 *  @note The kernel will start all threads on the requested core even
 *        though the callee only requests with a single PIR value.
 *
 *  @return 0 or -(errno) on failure.
 *
 *  @retval -ENXIO - The core ID was outside of the range the kernel is
 *                   prepared to support.
 */
int cpu_start_core(uint64_t pir,uint64_t i_threads);

/**
 * @enum CpuSprNames
 *
 * Names for SPR registers for cpu_spr_value().
 */
enum CpuSprNames
{
    CPU_SPR_MSR,
    CPU_SPR_LPCR,
    CPU_SPR_HRMOR,
};

/** @fn cpu_spr_value
 *  @brief Reads the kernel-desired value for an SPR.
 *
 *  This is used, for instance, in building a sleep-winkle image.
 *
 *  @return The desired value of the SPR register.
 */
uint64_t cpu_spr_value(CpuSprNames spr);

/** @fn cpu_master_winkle
 *  @brief Winkle the master core so runtime SLW image can be applied.
 *
 *  This requires that the master core is the only one executing instructions.
 *  Will execute the winkle instruction on all running threads and return when
 *  an IPI is receieved on the master thread of the core.
 *
 *  @retval 0 - Success
 *  @retval -EDEADLK - Cores other than the master are already running.
 *
 *  @note This function will migrate the task to the master thread and in the
 *        process will unset any task affinity.  See task_affinity_unpin().
 */
int cpu_master_winkle();

/** @fn cpu_all_winkle
 *  @brief Winkle all the threads.
 *
 *  This is used in multi-node systems to quiesce all the cores in a drawer
 *  prior to the fabric being stitched together.
 *
 *  @retval 0 - Success
 *
 *  @note This function will migrate the task to the master thread and in the
 *        process will unset any task affinity.  See task_affinity_unpin().
 */
int cpu_all_winkle();

/** @fn cpu_crit_assert
 *  @brief Forces a Terminate Immediate after a crit-assert is issued
 *  @param[in] i_failAddr - value in the linkRegister of the address
 *           of where the fail ocured.
 *
 *  @return none
 */
void cpu_crit_assert(uint64_t i_failAddr);

#ifdef __cplusplus
}
#endif

#endif
OpenPOWER on IntegriCloud