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<!-- IBM_PROLOG_BEGIN_TAG -->
<!-- This is an automatically generated prolog. -->
<!-- -->
<!-- $Source: chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml $ -->
<!-- -->
<!-- IBM CONFIDENTIAL -->
<!-- -->
<!-- EKB Project -->
<!-- -->
<!-- COPYRIGHT 2015,2016 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
<!-- The source code for this program is not published or otherwise -->
<!-- divested of its trade secrets, irrespective of what has been -->
<!-- deposited with the U.S. Copyright Office. -->
<!-- -->
<!-- IBM_PROLOG_END_TAG -->
<!-- -->
<!-- @file memory_mss_freq.xml -->
<!-- @brief Error xml for mss_freq -->
<!-- -->
<!-- *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> -->
<!-- *HWP HWP Backup: Brian Silver <bsilver@us.ibm.com> -->
<!-- *HWP Team: Memory -->
<!-- *HWP Level: 1 -->
<!-- *HWP Consumed by: HB:FSP -->
<!-- -->
<!-- //TK - This needs to be cleaned up after mss_freq is refactored - AAM -->
<hwpErrors>
<hwpError>
<rc>RC_MSS_INVALID_TIMING_VALUE</rc>
<description>Invalid value calculated for timing value based on MTB and FTB from SPD.</description>
<ffdc>VALUE</ffdc>
<callout>
<target>DIMM_TARGET</target>
<priority>HIGH</priority>
</callout>
<deconfigure>
<target>DIMM_TARGET</target>
</deconfigure>
</hwpError>
<hwpError>
<rc>RC_MSS_REACHED_HIGHEST_TCK</rc>
<description>
No valid tCK exists that would produce a CAS latency that is common among all dimms.
</description>
<ffdc>TCK</ffdc>
</hwpError>
<hwpError>
<rc>RC_MSS_NO_COMMON_SUPPORTED_CL</rc>
<description>Current Configuration has no common supported CL values.</description>
<ffdc>CL_SUPPORTED</ffdc>
<callout>
<target>MCS_TARGET</target>
<priority>HIGH</priority>
</callout>
<deconfigure>
<target>MCS_TARGET</target>
</deconfigure>
</hwpError>
<hwpError>
<rc>RC_MSS_EXCEED_TAA_MAX_NO_CL</rc>
<description>Exceeded TAA MAX with Lowest frequency. No compatable CL.</description>
<ffdc>CL</ffdc>
<callout>
<target>DIMM_TARGET</target>
<priority>HIGH</priority>
</callout>
<deconfigure>
<target>DIMM_TARGET</target>
</deconfigure>
</hwpError>
<hwpError>
<rc>RC_MSS_FREQ_NOT_EQUAL_NEST_FREQ</rc>
<description>
Case when mss_freq speeds are different and sync mode is required,
and mss_freq is not equal to nest freq.
</description>
<ffdc>MSS_FREQ</ffdc>
<ffdc>NEST_FREQ</ffdc>
<callout>
<target>MCS_TARGET</target>
<priority>HIGH</priority>
</callout>
<deconfigure>
<target>MCS_TARGET</target>
</deconfigure>
</hwpError>
<!-- TK - Should this be FFDC or just return FAPI2_RC_FALSE? - AAM -->
<hwpError>
<rc>RC_MSS_UNSUPPORTED_FREQ_CALCULATED</rc>
<description>The frequency calculated with spd data is not supported by the jedec standards.</description>
<ffdc>DIMM_MIN_FREQ</ffdc>
</hwpError>
<!-- TK - I don't think this belongs in this file - AAM -->
<hwpError>
<rc>RC_MSS_UNSUPPORTED_DEV_TYPE</rc>
<description>Device type is not DDR4.</description>
<ffdc>DEV_TYPE</ffdc>
<callout>
<target>DIMM_TARGET</target>
<priority>HIGH</priority>
</callout>
<deconfigure>
<target>DIMM_TARGET</target>
</deconfigure>
</hwpError>
</hwpErrors>
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