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<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
<!-- This is an automatically generated prolog.                             -->
<!--                                                                        -->
<!-- $Source: src/import/chips/p9/procedures/xml/attribute_info/freq_attributes.xml $ -->
<!--                                                                        -->
<!-- OpenPOWER HostBoot Project                                             -->
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<!-- Contributors Listed Below - COPYRIGHT 2015,2018                        -->
<!-- [+] International Business Machines Corp.                              -->
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<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
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<!-- implied. See the License for the specific language governing           -->
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<!-- IBM_PROLOG_END_TAG                                                     -->
<!-- freq_attributes.xml -->
<attributes>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_FREQ_PROC_REFCLOCK_KHZ</id>
    <targetType>TARGET_TYPE_SYSTEM</targetType>
    <description>
      The frequency of the processor refclock in kHz.
      Provided by the Machine Readable Workbook.
      This can be overridden to adjust the refclock frequency.
    </description>
    <valueType>uint32</valueType>
    <platInit/>
    <default>133333</default>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_FREQ_MEM_REFCLOCK</id>
    <targetType>TARGET_TYPE_SYSTEM</targetType>
    <description>
      The frequency of the memory refclock in MHz.
      Provided by the Machine Readable Workbook.
      This is read by the set_ref_clock HWP to find out the desired frequency.
      This can be overridden to adjust the refclock frequency.
    </description>
    <valueType>uint32</valueType>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_MAX_ALLOWED_DIMM_FREQ</id>
    <targetType>TARGET_TYPE_SYSTEM</targetType>
    <description>
      Maximum frequency (in MHz) that this system can run the DIMMs at.
      There are 5 possible values determined by the dimm configuration.
      For configurations which have mixed rank configurations, the lowest
      frequency based on ranks of either DIMM is chosen. For example if
      there was a 1R and a 2R DIMM installed, and 1R dual drop was a lower
      max freq than 2R dual drop, then the 1R max freq would be the max allowed.
        [0]=One rank, single drop
        [1]=Two rank, single drop
        [2]=Four rank, single drop
        [3]=One rank, dual drop
        [4]=Two rank, dual drop
      A value of zero would indicate an unsupported configuration. Note: Do not
      use this attribute to limit configurations, it is not checked during plug rules.
      If you have an unsupported configuration, use the value 0 as the maximum freq.
    </description>
    <valueType>uint32</valueType>
    <array>5</array>
    <platInit/>
    <mssAccessorName>max_allowed_dimm_freq</mssAccessorName>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_MEMVPD_POS</id>
    <targetType>TARGET_TYPE_MCS</targetType>
    <description>
      The position of the MCS target's VPD selector data, relative to the EEPROM
      that contains its data.  The VPD defition supports up to 16 values per
      EEPROM.
      For systems with an EEPROM per chip, this value should be equivalent to
      ATTR_CHIP_UNIT_POS.
      For systems with a single EEPROM for all chips, the value should follow
      the physical position in such a way to fit within the 16 available slots.
    </description>
    <valueType>uint8</valueType>
    <platInit/>
  </attribute>
  <!-- ********************************************************************* -->
  <attribute>
    <id>ATTR_REQUIRED_SYNCH_MODE</id>
    <targetType>TARGET_TYPE_SYSTEM</targetType>
    <description>
      Specify the system policy to enforce synchronous mode between memory and
      nest. This drives the value of ATTR_MEM_IN_SYNCH_MODE.
         UNDETERMINED : Run synchronously if the dimm and nest freq matches
         ALWAYS : Require matching frequencies and deconfigure memory that
                  does not match the nest
         NEVER : Do not run synchronously, even if the frequencies match
    </description>
    <valueType>uint8</valueType>
    <enum>UNDETERMINED=0, ALWAYS=1, NEVER=2</enum>
    <platInit/>
    <mssAccessorName>required_synch_mode</mssAccessorName>
  </attribute>
  <!-- ********************************************************************* -->
</attributes>
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