1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
|
/* IBM_PROLOG_BEGIN_TAG */
/* This is an automatically generated prolog. */
/* */
/* $Source: src/import/chips/p9/procedures/hwp/pm/p9_setup_evid.H $ */
/* */
/* OpenPOWER HostBoot Project */
/* */
/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
/* You may obtain a copy of the License at */
/* */
/* http://www.apache.org/licenses/LICENSE-2.0 */
/* */
/* Unless required by applicable law or agreed to in writing, software */
/* distributed under the License is distributed on an "AS IS" BASIS, */
/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
/* implied. See the License for the specific language governing */
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
///
/// @file p9_setup_evid.H
/// @brief Setup External Voltage IDs
///
// *HWP HW Owner : Greg Still <stillgs@us.ibm.com>
// *HWP FW Owner : Prasad Bg Ranganath <prasadbgr@in.ibm.com>
// *Team : PM
// *Consumed by : HB
// *Level : 3
///
#ifndef __P9_SETUP_EVID_H__
#define __P9_SETUP_EVID_H__
#include <fapi2.H>
#include <p9_pstate_parameter_block.H>
enum P9_SETUP_EVID_CONSTANTS
{
// By convention, the Pstate GPE will use bridge 0. Other entities
// will use bridge 1
BRIDGE_NUMBER = 1,
// Default voltages if mailbox -> attributes are not setup
AVSBUS_RETRY_COUNT = 5,
VDD_SETUP = 6,
VDN_SETUP = 7,
VCS_SETUP = 8,
};
extern "C"
{
/// @typedef VoltageConfigActions_t
/// enum of the two actions this hwp can perform
/// it can either compute default voltage settings
/// otherwise it can apply voltage setting to the system
/// @typedef p9_setup_evid_FP_t
/// function pointer typedef definition for HWP call support
typedef fapi2::ReturnCode (*p9_setup_evid_FP_t) (
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>&,
const VoltageConfigActions_t);
/// @brief Set safe mode values to DPLL fmult,fmin and fmax
/// @param [in] i_target TARGET_TYPE_PROC_CHIP
/// @param [in] i_freq_proc_refclock_khz proc clock frequency
/// @param [in] i_proc_dpll_divider proc dpll divider value
//@return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
fapi2::ReturnCode
p9_setup_dpll_values (const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const uint32_t i_freq_proc_refclock_khz,
const uint32_t i_proc_dpll_divider);
/// @brief Read attributes containing part's boot voltages(VDD,VCS and VDN)
/// and set these voltage using the AVSBUS interface (VDD, VDN and VCS).
///
/// @param [in] i_target TARGET_TYPE_PROC_CHIP
/// @param [in] i_action Describes whether you wish to COMPUTE voltage settings
/// during the step or if you would like to APPLY them.
/// @attr
/// @attritem ATTR_VCS_BOOT_VOLTAGE - 1mV grandularity setting for VCS rail
/// @attritem ATTR_VDD_BOOT_VOLTAGE - 1mV grandularity setting for VDD rail
/// @attritem ATTR_VDN_BOOT_VOLTAGE - 1mV grandularity setting for VDN rail
/// @attritem ATTR_VDD_AVSBUS_BUSNUM - AVSBus Number having the VDD VRM
/// @attritem ATTR_VDD_AVSBUS_RAIL - AVSBus Rail number for VDD VRM
/// @attritem ATTR_VDN_AVSBUS_BUSNUM - AVSBus Number having the VDN VRM
/// @attritem ATTR_VDN_AVSBUS_RAIL - AVSBus Rail number for VDN VRM
/// @attritem ATTR_VCS_AVSBUS_BUSNUM - AVSBus Number having the VCS VRM
/// @attritem ATTR_VCS_AVSBUS_RAIL - AVSBus Rail number for VCS VRM
///
///@return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
fapi2::ReturnCode
p9_setup_evid(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const VoltageConfigActions_t i_action);
/// @brief update VDD,VDN and VCS voltage values
/// @param [in] i_target TARGET_TYPE_PROC_CHIP
/// @param [in] i_bus_num AVS BUS number
/// @param [in] i_rail_select AVS bus rail select
/// @param [in] i_voltage_mv voltage value in mv
/// @param [in] i_evid_value EVID setup mode
/// @param [in] i_ext_vrm_step_size_mv Maximum VRM step size in mv
//@return fapi::ReturnCode. FAPI2_RC_SUCCESS if success, else error code.
fapi2::ReturnCode
p9_setup_evid_voltageWrite(
const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
const uint8_t i_bus_num,
const uint8_t i_rail_select,
const uint32_t i_voltage_mv,
const uint32_t i_ext_vrm_step_size_mv,
const P9_SETUP_EVID_CONSTANTS i_evid_value);
} // extern C
#endif // __P9_SETUP_EVID_H__
|
