blob: a992bca924f3c85f9f74359472ac39a0de2b2e89 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
|
# Note : Assumes these vars were setup in startup.simics
# $hb_masterproc : name of master proc chip object
# $hb_pnor : name of pnor object associated with master proc
($hb_masterproc).proc_fsi2host_mbox->responder_enable=1
# Preload VPD in PNOR
foreach $pnor in (get-object-list Lpc2SpiFpgaCmp) {
try {
run-python-file (lookup-file hbfw/hb-pnor-vpd-preload.py)
($pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x1C5000
($pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x17D000
($pnor).sfc_master_mem.load-file ./syscvpd.dat.ecc 0x255000
} except { echo "ERROR: Failed to preload VPD into PNOR." }
}
#Write the PNOR MMIO addr into Scratch 2, 0x283A
#($hb_masterproc).proc_lbus_map.write 0x28e8 0xFFF78000 #HB PNOR addr
foreach $cc in (get-object-list p8_proc) {
($cc).proc_lbus_map.write 0x28e8 0xFFF78000
}
# Loop through every processor chip
foreach $cc in (get-object-list p8_proc) {
echo $cc
#Trigger a power on to cec-chip
echo "-Trigger power on"
@mp="%s.proc_chip"%simenv.cc
@SIM_get_interface(SIM_get_object(mp),"signal").signal_raise(SIM_get_object(mp))
#Trigger the flush, load, and SBE start
echo "-Trigger SBE"
($cc).proc_lbus_map.write 0x28E0 0x0000F3FF #NonFunc EX (only 4,5 is good)
($cc).proc_lbus_map.write 0x2848 0x00000FFF #GP3 0x2812 (flush)
($cc).proc_lbus_map.write 0x2870 0xB0000000 #SBE Vital 0x281C (load)
($cc).proc_lbus_map.write 0x2870 0x30000000 #SBE Vital 0x281C (start)
}
###################################
#Configure SFC (mimmic FSP Setup)
###################################
echo "Configure SFC"
foreach $pnor in (get-object-list Lpc2SpiFpgaCmp) {
echo $pnor
#Direct Read window config
($pnor).sfc_master->regs_OADRNB = 0xC000000
($pnor).sfc_master->regs_ADRCBF = 0x0
($pnor).sfc_master->regs_ADRCMF = 0xF
#Direct Access Cache Disable
($pnor).sfc_master->regs_CONF = 0x00000002
#Small Erase op code
($pnor).sfc_master->regs_CONF4 = 0x00000020
#Erase Size
($pnor).sfc_master->regs_CONF5 = 0x1000
#Enable 4 byte address mode - must write via memory to trigger
#model behavior
($pnor).fsi_local_lbus_map.write 0xC40 0x00006E00
}
###################################
#Enable the IPMI Responder
###################################
echo "Enable IPMI Responder"
try {
run-python-file (lookup-file hbfw/ipmi_bt_responder.py)
} except { echo "ERROR: Failed to load IPMIresponder." }
|