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# Note : Assumes these vars were setup in startup.simics
# $hb_masterproc : name of master proc chip object
# $hb_pnor : name of pnor object associated with master proc
($hb_masterproc).proc_fsi2host_mbox->responder_enable=1
# Preload VPD in PNOR
try {
run-python-file (lookup-file hbfw/hb-pnor-vpd-preload.py)
($hb_pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x1C5000
($hb_pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x17D000
($hb_pnor).sfc_master_mem.load-file ./syscvpd.dat.ecc 0x255000
} except { echo "ERROR: Failed to preload VPD into PNOR." }
#Write the PNOR MMIO addr into Scratch 2, 0x283A
($hb_masterproc).proc_lbus_map.write 0x28e8 0xFFF78000 #HB PNOR addr
foreach $cc in (get-object-list p9_proc) {
($cc).proc_lbus_map.write 0x28e8 0xFFF78000
}
# Loop through every processor chip
foreach $cc in (get-object-list p9_proc) {
echo $cc
#Trigger a power on to cec-chip
#echo "-Trigger power on"
@mp="%s.proc_chip"%simenv.cc
@SIM_get_interface(SIM_get_object(mp),"signal").signal_raise()
# @todo-RTC:130184 Add real SBE behavior
#Trigger the flush, load, and SBE start
#echo "-Trigger SBE"
#($cc).proc_lbus_map.write 0x28E0 0x0000F3FF #NonFunc EX (only 4,5 is good)
#($cc).proc_lbus_map.write 0x2848 0x00000FFF #GP3 0x2812 (flush)
#($cc).proc_lbus_map.write 0x2870 0xB0000000 #SBE Vital 0x281C (load)
#($cc).proc_lbus_map.write 0x2870 0x30000000 #SBE Vital 0x281C (start)
# workaround to trigger sbe start
($cc).proc_chip.invoke parallel_store STARTSBEREGS 0 "80000000" 32
}
system_cmp0.cpu0_0_00_0.enable
###################################
#Enable the IPMI Responder
###################################
echo "Enable IPMI Responder"
try {
run-python-file (lookup-file hbfw/ipmi_bt_responder.py)
} except { echo "ERROR: Failed to load IPMIresponder." }
###################################
#Enable SBE
###################################
echo "Enable the SBE"
($hb_masterproc).sbe.mibo_space.write 0xc0000160 0x8000100000000000 8 -b
($hb_masterproc).sbe.mibo_space.write 0xc00e0000 0x5000000000000000 8 -b
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