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< <id>PROC_PCIE_LANE_EQUALIZATION</id>
< <description>PCIE Lane Equalization values for each PHB
< creator: MRW
< consumer: HDAT
< firmware notes:
< PCIE Lane Equalization values for each PHB
< Array index: PHBs (0:3)
< Lane Settings (0:31)
< </description>
< <simpleType>
< <uint8_t>
< </uint8_t>
< <array>4,32</array>
< </simpleType>
< <persistency>non-volatile</persistency>
< <readable/>
< <fspOnly/>
< </attribute>
< <attribute>
1413,1427d1412
< <attribute>
< <id>OCC_MASTER_CAPABLE</id>
< <description>
< This attribute is to determine whether an occ is master capable.
< An OCC is master capable if it's parent processor is wired to the
< APSS.
< </description>
< <simpleType>
< <uint8_t>
< </uint8_t>
< </simpleType>
< <persistency>non-volatile</persistency>
< <readable/>
< <fspOnly/>
< </attribute>
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