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* add values for ATTR_DPLL_VDM_RESPONSE enumerationsJoe McGill2016-08-041-4/+4
* FAPI2 - Error/FFDC work related updatesThi Tran2016-08-041-78/+0
* Update FFDC mechanism to better handle targets, buffersBrian Silver2016-08-041-2/+2
* Error/xml parsing and FFDC classesBrian Silver2016-08-041-0/+78
* OCC Special Timeout handlingSangeetha T S2016-08-041-0/+14
* Update istep lists to match the new mpipl flow for p9crgeddes2016-08-034-9/+9
* Make ATTR take generic target typesDean Sanner2016-08-032-19/+18
* Initial commit of memory subsystemBrian Silver2016-08-031-0/+198
* Change MSS_VOLT to MSS_VOLT_VDDRJacob Harvey2016-08-026-39/+57
* Parse HWP errorsMatt Derksen2016-08-027-45/+87
* Quiesce mailbox prior to starting deadman timerAndrew Geissler2016-08-011-31/+32
* Replace fake SPD with platform getSPDAndre Marin2016-08-012-5/+6
* Update TPM device tree entry to indicate additional Nuvoton compatibilityChris Engel2016-08-011-3/+5
* Implemented Scale-Out Reconfig Loops for P9Vitaly Marin2016-08-011-41/+27
* SecureBoot: Update sha1 bank of PCRs along with sha256Chris Engel2016-08-019-61/+182
* Made updates to reflect p9_io_intialization V1.3 doc.Ricardo Mata2016-08-011-58/+63
* Provide default value for NEST_PLL_BUCKET attributecrgeddes2016-08-011-1/+2
* p9_quad_power_off - restore call to p9_pfet_controlGreg Still2016-08-011-3/+3
* Backout call to p9_pfet_control to resolve missing dependencyGreg Still2016-08-011-3/+3
* L2 HWP p9_quad_power_offSumit Kumar2016-08-013-48/+56
* p9_quad_power_off.C Level 1Greg Still2016-08-014-0/+176
* Update RAM procedures.LiuYangFan2016-08-0111-364/+838
* L2 RAM procedures.LiuYangFan2016-08-0122-0/+2002
* L2 Delivery for p9_query_stop_stateBrian Vanderpool2016-08-014-41/+405
* L1 Delivery for p9_query_stop_stateBrian Vanderpool2016-08-013-0/+201
* Fix for the EKB build failure caused by hcd constantSangeetha T S2016-08-011-1/+2
* CORE/CACHE: core/cache/l2_stopclocks Level 2Yue Du2016-08-014-8/+292
* Level 1 HWP for p9_stopclocksSoma BhanuTej2016-08-012-7/+3
* CORE/CACHE: add Level1 cache/l2/core stopclocks proceduresYue Du2016-08-016-0/+278
* Updated ring_identification list: Now synchronized with ringId.H.Claus Michael Olsen2016-08-012-127/+143
* Add no variable tracking to initfile procedures to imporve build timePrachi Gupta2016-08-0120-0/+20
* Integrating initfiles: NEST cxa/int/nx/mmuThi Tran2016-08-013-6/+101
* Add default for FREQ_PB_MHZ to simics_NIMBUS.system.xmlAndres Lugo-Reyes2016-08-011-0/+4
* Add MRW attributes moved from VPDAndre Marin2016-08-013-1/+280
* Limit checkForIplAttentions to master in early IPLBrian Stegmiller2016-07-317-9/+156
* Add getChipletNumber to Target ClassLateef Quraishi2016-07-308-8/+1853
* Adding SCOM addr translation for PPE chip unitsThi Tran2016-07-294-50/+283
* p9_xip_customize L1 checkin w/backwards support for Seeprom MB settings.Claus Michael Olsen2016-07-294-40/+220
* Fix p9_mss_utils_to_throttle, create throttles API, attribute cleanupAndre Marin2016-07-294-293/+74
* Improve ATTR_PGDan Crowell2016-07-291-1/+6
* Adding in writing to HRMOR for bootloaderCHRISTINA L. GRAVES2016-07-293-0/+28
* New attributes needed by p9_dump_stop_info.CAndres Lugo-Reyes2016-07-282-1/+37
* CORE/CACHE: core/cache/l2_stopclocks Level 2Yue Du2016-07-281-0/+8
* Set up mrsXX.o objects to be built for ddr4 updatecrgeddes2016-07-281-0/+10
* Re-enabled istep 6.12crgeddes2016-07-281-3/+1
* Add TYPE_CAPP as scommable typecrgeddes2016-07-282-5/+17
* Refactor fapi2 scom interface to use pib_err_maskcrgeddes2016-07-2815-13/+293
* Changes for P9 SBE - P8 port and FAPI2 convertMarty Gloff2016-07-277-799/+177
* More fixes for issues found during start_pm_complexCorey Swenson2016-07-275-6/+29
* Support for TPM Required attribute to allow system to IPL without a TPMChris Engel2016-07-276-68/+149
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