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* Add page tables to read only partitionsChen Du2019-05-0910-47/+263
| | | | | | | | | | | | | | | | | | Changed partitions (WOFDATA, MEMD) to be signed with a hash page table bit. This generates a hash page table in the protected payload which will be used to validate pages in the unprotected payload Change-Id: I9be4b1f6e65b9a52a8b6ba23affdacc4d89f5295 RTC: 179519 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72776 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add keyword support for OCMB SPD readsMatthew Raybuck2019-05-093-66/+341
| | | | | | | | | | | | | | | | | | Currently the only supported keyword was ENTIRE_SPD for OCMB chips. This commit adds support for all of the common keywords (modSpec NA and DDIMM) for DDRx DIMMs and new keywords for OCMB_MODULE_PART_NUMBER and OCMB_MODULE_SERIAL_NUMBER. Change-Id: Ib29fb6153e47e56b24a1e7f51c8cbf33e6a48d73 RTC:203788 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76922 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add Axone to RISK_LEVEL logicDan Crowell2019-05-082-9/+44
| | | | | | | | | | | | | | | | | | Axone reuses the RISK_LEVEL settings for Nimbus DD2.3 so changes are made to reflect that. This is primarily a documentation exercise but there is logic now to normalize the RISK_LEVEl up to 4,5 versus 0,1 just to stay sane and reduce the test matrix. Change-Id: I5410d1bf7b12fc7f771e2c9826fcd086b2520091 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76757 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Jayashankar Padath <jayashankar.padath@in.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add exp_scrubAlvin Wang2019-05-072-3/+4
| | | | | | | | | | | | | | | Change-Id: Ibf52a563c7d8ce3e1cc97d07f3801b3bca58eddd Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70247 Dev-Ready: Alvin Wang <wangat@tw.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75146 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Temporarily disable the exp_fw_update test in SimicsDan Crowell2019-05-071-0/+2
| | | | | | | | | | | | | Simics needs to support the word-swap logic, disabling the test until it does. Change-Id: Id94a9faf64a5f631b99d1d1d1514d338e7716bd5 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76972 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update simbuild for axone simics bringupGlenn Miles2019-05-071-9/+9
| | | | | | | | | | | | | | | | | | | | | The XML for the RAM1 register was not being parsed correctly resulting in too few registers being allocated in uchip_regs.chip not defining all of the registers. This latest build adds those registers manually until the parser can be fixed. This build also sets the POR values for the RAM1 registers. Also changes OCMB I2C addresses to 0x40 Change-Id: Icd2df80874200741d82fc152cb4b8bdbc75c5bed Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76764 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add keywords for part and serial number for DDIMMMatthew Raybuck2019-05-071-1/+3
| | | | | | | | | | | | | | | | Adds the PART_NUMBER and SERIAL_NUMBER keywords to spdDDR4.H for DDIMM modules. This way OCMBs don't need to read the ENTIRE_SPD and then index to the correct spot. Change-Id: Id0aa805b10305b75fd4f57bb92acb7bbef5667e5 RTC:203788 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76921 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Load and validate OCMB FW image in istep 12.13Glenn Miles2019-05-077-1/+694
| | | | | | | | | | | | | | | | Adds function for loading and validating the OCMB firmware image. RTC: 193924 Change-Id: I398d80940710f46cf7e0b66ed663116e574e54b9 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76624 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add gemini HWP calling into hostbootMatt Derksen2019-05-077-283/+582
| | | | | | | | | | | | | | | | | Added gem_getecid call in istep12. Adding NOOP calls for omi_setup, scominit, draminit_mc, and thermal_init if chip is Gemini. Change-Id: I677dd4dea0b39095c73d8b0769592ce68373ee6d RTC:204647 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76602 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set i2c slave's port correctly in Axone XML for OCMB targetsChristian Geddes2019-05-071-34/+50
| | | | | | | | | | | | | | | | We had ocmbs0-7 pointing at port 0, when according to the simics model these should be port 1. Also we have ocmb8 set incorrectly, according to the simics model this should be port 0 but instead we had it set to port 1. This commit addresses these issues. Change-Id: I7eb0baeb5a7725f0da3452b121d07690bfb73cb0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76900 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Corrected bad logic, in an if statement, that was creating a bad traceRoland Veloz2019-05-071-60/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Corrected bad logic that was NOT guarding a check for when the procIOMask did not match the coreMask: Old logic: if ( (NULL == err) && (procIOMask == coreMask)) { ... } else if ( procIOMask != coreMask ) <-- bad logic { ... } <--- produced bad/confusing trace else { ... } New logic: if (nullptr == err ) { if (procIOMask == coreMask) { ... } else <-- good logic to guard (procIOMask != coreMask) with if (nullptr == err ) { ... } <--- trace is no longer confusing } else { ... } Change-Id: Ic852e1e4c670b021b48354efbdc51bd1a009115c CQ:SW464063 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76840 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Added more error reporting to HWSV when PNOR fails, removed superfluous codeRoland Veloz2019-05-073-38/+41
| | | | | | | | | | | | | | | | | | | | | | | | - Replaced the terminate (terminateExecuteTI) raw calls with bl_terminate. Returning descriptive RC codes with bl_terminate call. - Module ID MOD_PNORACC_FINDTOC(=0x08) was added to hbblModuleId enums. - Return codes RC_LPC_ERR(HBBL_COMP_ID | 0x10) and RC_TOC_NOT_FOUND_ERR(HBBL_COMP_ID | 0x11) added to hbblReasonCode enums. - Freed up space in bootoloader: - Removed unnecessary calls to the method PNOR::checkForNullBuffer, because the call is always guaranteed to return with no error. - Once the calls to PNOR::checkForNullBuffer were dropped, the method PNOR::checkForNullBuffer is no longer necessary - removed it from production code. - The unit tests relied heavily on the call to PNOR::checkForNullBuffer, was not sure if the call could be removed from the unit tests, so relocated the PNOR::checkForNullBuffer method to the unit tests, out of production code. Change-Id: I1e3f8915ee4ed9b75ad74c57627ca1d2bc3a458d CQ:SW464040 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76787 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Compile and call exp_draminit in istep 13.10Christian Geddes2019-05-062-9/+10
| | | | | | | | | | | | | | | | | | This commit adds the call to exp_draminit which sends the command EXP_FW_DDR_PHY_INIT to the explorer chip. Currently simics is just returning valid response and the data associated with the response is all 0s. This is acceptable for the time being. RTC: 207856 Change-Id: Ie160d1e6405d1c2922500c40f04c9f5470d7db23 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76755 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set endianess switch attributes to workaround inband OCMB sim issuesChristian Geddes2019-05-021-10/+27
| | | | | | | | | | | | | | | | | | We are seeing in simics that these attributes need to be flipped from their default values. This indicates that simics is interpretting the spec that describes this communication differently than what the test board is doing currently. This issue needs to be resolves when we get hardware. Change-Id: I78341df30336bd21b96db2851e8c1caa5904ca57 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76696 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Handle DD2.3 mode properly when setting elevated risk in HDATDan Crowell2019-05-021-2/+10
| | | | | | | | | | | | | | | | | | When running in native (DD2.3) mode, the value of ATTR_RISK_LEVEL is always greater than zero. The code needs to handle the higher values when setting the elevated risk level bit in the HDAT structures that go up to the OS. Change-Id: Ib8d9c4f885ad84cf2b0344e38d6e3c74b7c21ef8 CQ: SW464159 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76728 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jayashankar Padath <jayashankar.padath@in.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* General Improvement: Get HB standalone + op-build working with GCC8Luis Fernandez2019-05-021-1/+1
| | | | | | | | | | | | | | | | Fix issue where when compiling with GCC 8, illegal instruction of value 0x0 is placed instead of the expected "blr" instrusction. Change-Id: I2ff28d5549689d541ea24d102230cbfc22cbbbff RTC: 163075 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76650 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add new 'expupd' moduleGlenn Miles2019-05-016-0/+349
| | | | | | | | | | | | | | | | | | Chages required to add the 'expupd' module which will contain hostboot support and tests for updating the explorer chip firmware. RTC: 193924 Change-Id: Iceddc675e8078aeafe62893df8febb531f4a0cf0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76623 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Gemini vs Explorer Presence Detection via SPDMatthew Raybuck2019-05-014-145/+520
| | | | | | | | | | | | | | | | | | | | | | | Since the OCMB chip is held in reset until after presence detection the IDEC register cannot be read to differentiate between Gemini and Explorer chip types. To work around this issue, during the early part of IPL when presence detection is occurring the OCMB IDEC function will instead read the SPD and populate the necessary attributes with what is found there. That will be used to determine the difference between Gemini and Explorer until later when the OCMB IDEC register can be read from. At that point the IDEC read will be executed again and the data read from the OCMB IDEC register will be used to cross-check the data read from the SPD. Any discrepancies will be handled with predictive error logs. Change-Id: Ica664b06ff3488f48253d3ef02eff2d49c5d240d RTC: 208696 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76108 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove workaround setting EFF_DIMM_SIZE attributeChristian Geddes2019-05-011-4/+0
| | | | | | | | | | | | | | | | | | We were missing some functionality in the eff_config HWP that set this attribute so we had to put a workaround in place to make sure it was set correctly. This value should be getting read out of the SPD during eff_config now so we can remove this workaround. Change-Id: I373f92c0e2b2238dfac54d9ae50973ed3ff00a57 RTC: 207850 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76569 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to p9a_omi_io_dccal in istep 12.6Christian Geddes2019-05-012-12/+136
| | | | | | | | | | | | | | | | | | As per the P9A IPL Flow document we must call p9a_omi_dccal in istep 12.6 during axone IPLs after we have called p9a_omi_io_scominit. Update XML to set approriate OMI_DL_GROUP_POS attribute settings on OMIs. This was done using the mapping described in the description of the FAPI attribute to map the CHIP_UNIT to this group pos. Change-Id: Ib48967b0b830ddf43b0028b978fca19d6ad9be8f RTC: 195554 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72971 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support writable ATTR_FREQ_MCA_MHZ for AxoneDan Crowell2019-04-303-4/+68
| | | | | | | | | | | | | | | | | ATTR_FREQ_MCA_MHZ is being reused on Axone to drive the memory clocks out to the OMIs. Previously this value was locked to the NEST/PB frequency so the value was constant. Change-Id: I4ab7625c2e22efc83ad63a463ebbb208392209ff Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76315 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add SMF mode flag to HOMER for use by OCCChris Cain2019-04-304-2/+39
| | | | | | | | | | | | | | Change-Id: I03daab724811f09aa83c4e0d7929f0a013a2b731 RTC: 164116 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76398 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: Sheldon Bailey <baileysh@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Compile Gemini hardware procedures in hostbootMatt Derksen2019-04-304-81/+211
| | | | | | | | | | | | | | | | | | This is just the start of importing/compiling the Gemini hardware procedures. This commit compiles the helper functions in mss library, and then compiles/calls gem_draminit in istep 13. Change-Id: I837a5d8507c882c41650d06bccfcf25cd11688c8 RTC:204647 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76522 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Collect IDEC for Explorer chipMatthew Raybuck2019-04-303-19/+250
| | | | | | | | | | | | | | | | | | | The OCMB Explorer Chip doesn't read for IDEC but instead assumes hardcoded values. Since the Explorer chip is held in reset until iStep 10.4, this commit will prevent IDEC reads during discoverTargets and instead perform the read when exp_check_for_ready() is successful. Change-Id: I4ef5a01badb195acca0c2187ef76ea55f58eafe4 RTC:201996 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75881 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove workaround filtering invalid filenamesChristian Geddes2019-04-291-4/+0
| | | | | | | | | | | | | | | | | | | When Axone HWPs first started coming in from the memory team they were naming some of the files the same name as what they did for the nimbus version of these files. This caused issues when we tried to compile because there were naming collisions. These file names have changed to have the model prepended to the filename Change-Id: I9868e39cb70c34f9eb3fbd7244b7c2065620f3eb RTC: 207832 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76568 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable p9_pm_stop_gpe_init call in istep15Matt Derksen2019-04-261-4/+5
| | | | | | | | | | | | | | | Previously commented out for axone, now supported. Tested by unset EARLY_TESTCASES in simics_axone.config Change-Id: If62ab5b2c87d115d0f9f3e1fa20496e9f18c122e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76047 Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove GLOBAL PNOR PartitionMike Baiocchi2019-04-261-1/+0
| | | | | | | | | | | | | | | | | | The GLOBAL PNOR partition is not being used so this commit removes all references to it in PNOR constants, various PNOR layout files, and makefiles. It also has some general changes to improve error handling in builing pnors. Change-Id: I896be8c90c3ad9969c02399d015fa71399220181 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76218 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Clean up traces and comments in MMIO driverChristian Geddes2019-04-251-4/+4
| | | | | | | | | | | | | | Change-Id: I10374020f777c05c8778b1081aaf079f80783f97 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76220 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Only display ERRL user details callouts/strings when dumping error to consoleNick Bofferding2019-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | This commit fixes a bug wherein, when Hostboot dumped an error log to the console that contained user details with the same subsection ID as an ERRL string but for a different component ID, the information, which was often in binary format, would appear garbled, and would additionally terminate the BMC's SOL session due to invalid characters. The change narrows the scope of what gets emitted to just ERRL component strings/callouts. Change-Id: Ifbe83448a56955d44f0e775e123ffb95a6330b8a CQ: SW463437 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76381 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add mem_size and misc attrs, unit tests enableAndre A. Marin2019-04-251-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Consulting w/PRD (Zane), ATTR_EFF_DIMM_RANK_CONFIGED is not required to be initialized early in the ipl flow. So we move it from pre_eff_config to eff_config. Added attr_derived_engine to set attrs derived from other attrs or hardcodes. Updated unit tests. Added attrs not set in exp_draminit implementation of eff_config Change-Id: I0bb5e1913160d2cd0224cbb8566b7548eabe46d4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75440 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Mark Pizzutillo <mark.pizzutillo@ibm.com> Dev-Ready: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75575 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add p9a_mss_freq_system procedureLouis Stermole2019-04-251-9/+9
| | | | | | | | | | | | | | | | Change-Id: I84317d4886e90aece64ada26d3d7d53ba0868f1e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76023 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Dev-Ready: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76104 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Compile and call p9a_io_omi_scominitChristian Geddes2019-04-242-64/+152
| | | | | | | | | | | | | | | Add call to istep 12.6 to call p9a_io_omi_scominit as per P9A IPL Flow documentation. Change-Id: I2f274c6d09b41b0a2a5b2c18dd5365c6f830b27d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72879 Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Verify Dimm Type in DJVPD CacheBill Hoffa2019-04-241-8/+28
| | | | | | | | | | | Change-Id: I95cf68ff66ef8710b476fbd4802ea12870bd9509 CQ: SW463042 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76177 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Re-enable mss_draminit_trainadv parallelismNick Bofferding2019-04-241-2/+2
| | | | | | | | | | | | | | Allow four parallel threads in mss_draminit_trainadv Change-Id: I65cd4316371ef17d72216505e0986c5a47d8aa26 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76062 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add FAPI_POS and account for 4 possible PMIC targetsMatt Derksen2019-04-242-84/+137
| | | | | | | | | | | | | | | | | Forgot to add FAPI_POS with original PMIC target commit. New DIMMs will support 4 PMIC targets, so update simics_AXONE based on that information. Change-Id: I36b966ce7b57f0c1d7124893c5d487f34797b9d7 RTC: 206184 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76173 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add Child RC Checking to Thread PoolIlya Smirnov2019-04-247-21/+212
| | | | | | | | | | | | | | | | | | | | | | | Add logic for Thread Pool to return error log when shutdown() is called if a child thread (or multiple child threads) had crashed. This is a default behavior, but a constructor option can switch this functionality off. The new logic will aid in debugging of the failures of child processes, as the failures could be catched when they occurred and not at some point after. Change-Id: I9736d659a086701b8e4f18f41504df4864924d88 RTC: 208517 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75897 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Compile and call exp_draminit_mcChristian Geddes2019-04-232-32/+91
| | | | | | | | | | | | | | | | | | Per the P9A IPL Flow documentation we must call exp_draminit_mc during istep 13.12. On hardware this requires exp_draminit to have been called. But in simulation it shouldnt matter. I make this note because at the time of writing the the exp_draminit HWP is not being called. RTC: 195556 Change-Id: I2db07c461cf9f10b85d51c091964b62574abb62e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76256 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Defect fix for class RsvdTraceBuffer to fix ErrorLog flatten issueRoland Veloz2019-04-232-32/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fix is to correct an issue with the flattening of error logs. In particular 3 issues have been addressed in the method RsvdTraceBuffer::getTraceEntries(void* o_data, uint32_t i_dataSize) 1) The offset to insert the data entries into a returning buffer(o_data) was incorrect. It was using the size of the data for the first entry as the offset when it needed to be the size of the struct trace_buf_head_t because that struct is put first in the outgoing buffer(o_data) before the data items. 2) The method was returning the actual size of the data when it needed to be the size of the data in an alignment of 8 using ALIGN_8 method. 3) The method was returning the data in a skewed manner. Basically it was off by one. Which explains why the last entry was the foul one. Also added more comments and fixed spelling errors. Change-Id: Idabf519a36990cb1857d63d43304b6c0b9c04373 CQ: SW460919 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76075 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move MCBIST lib to generic folderAlvin Wang2019-04-228-16/+16
| | | | | | | | | | | | | | | | | | Change-Id: Ib717742707bea6a626131578f5a3b1aeebc76281 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69677 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Dev-Ready: STEPHEN GLANCY <sglancy@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69707 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Fix missing header file in eepromCache.CMike Baiocchi2019-04-191-1/+5
| | | | | | | | | | | | | | | | There was a use of a CONSOLE function in eepromCache.C but the necessary header file console/consoleif.H was not included. Change-Id: Iae02a9fd6c1f6bcc45a1e287a6466bb626b2c079 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76176 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Revert "Add OCMB_CHIP_TYPE Attribute"Michael Baiocchi2019-04-192-36/+0
| | | | | | | | | | | | | | This reverts commit 0da6ad912fdfae1b8d3ed8e117beede01365fc04. Change-Id: I4fdf24bdb25a2cd99279d064d2647aac27e6b4a6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76160 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove DJVPD and CVPD sections from axone pnor layoutMatt Derksen2019-04-192-3/+11
| | | | | | | | | | | | | | | | | | | | | Remove unneeded Centaur VPD and DIMM JEDEC VPD sections to help reduce axone pnor memory space. Hit a simics issue where sysmvpd.data.ecc size was overwriting the first four 4-byte words of HBB, so procmvpd_p9a.dat size was corrected to 64KB. procmvpd_p9c.dat had same issue, but the overwrite was being corrected by a following CVPD write. Change-Id: I70eb12709be0ac7b73609fb080d956ee2faa39a2 RTC:207995 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75896 Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Run Axone simics all the way to completion by defaultChristian Geddes2019-04-192-2/+2
| | | | | | | | | | | | | | | | Prior to this commit we ended the IPL at istep 14.7 and ran the CXX test suite before shutting down. This commit will allow us to run through istep 21 like a standard IPL. Change-Id: Ifb567dc30e7ecbb31ed59889ff900411633844bf Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76098 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move MSS MRW attributes to generic XMLLouis Stermole2019-04-192-7/+0
| | | | | | | | | | | | | | | | Change-Id: I13c4b88523b4ebda84193dd711f0fbb0772672f7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71436 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71465 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add new PMIC target for AxoneMatt Derksen2019-04-187-55/+864
| | | | | | | | | | | | | | | | PMIC is a voltage regulator for the DDIMM. It supplies power to the OCMB and DIMM targets. Change-Id: I10c1b03169f53b070f521ec9cd60cdbd15c4a268 RTC:206184 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75136 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add p9a_omi_init and exp_omi_init calls to istep 12.13Christian Geddes2019-04-182-41/+152
| | | | | | | | | | | | | | | | As per P9A IPL Flow document exp_omi_init followed by p9a_omi_init must be called during istep 12 prior to firmware update of explorer card. Change-Id: I00b51f075152d2120143661404755ec5791c1691 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75097 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Compile and call p9a_omi_setup_bars in istep 12.3Christian Geddes2019-04-182-5/+51
| | | | | | | | | | | | | | | | As per P9A IPL documentation, we must call p9a_omi_setup_bars on all processors during istep 12.3. Change-Id: I2c64a6d079368d91af218187344b7d8ed3b53ee6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72735 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Infer presense detection of Explorer chip from VPD EEPROMMatthew Raybuck2019-04-181-53/+11
| | | | | | | | | | | | | | | | | | | | During presense detection the explorer chip is being held in reset. In this state it will not respond to any I2C operations and therefore we cannot physically detect the chip during normal presense detection. Instead we infer its presense based on the presense of the associated VPD EEPROM. Change-Id: Id07eb77fc9c3eab09e852b191ad4a32832880c38 RTC:203722 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75891 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update OCMB 9-15 to have valid i2c and eeprom infoMatthew Raybuck2019-04-181-36/+148
| | | | | | | | | | | | | | | | | | | | | | | | | The simics model only has 9 valid ocmbs represented on the master processor. ocmbs 0-7 are behind a 1-8 MUX and ocmb 8 is directly connected. This leaves ocmbs 9-15 for us to fill out. The information must be valid enough to allow the code to process the targets correctly, but we must fake out some information for the the sake of the awkward simics model. We have decided that for ocmbs 9-11 we will match everything from ocmb8 except increment the devAddr of the I2C info attributes A2,A4,A6, D2,D4,D6. For ocmbs 12-15 we have picked a new port (2) and used the same dev addr increments. This slightly invalid data allows the code to have the targets show up as PRESENT but not FUNCTIONAL Change-Id: I3aec520a04e89829554c277a4cf02e1981b7ed84 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75999 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Validate OMI INBAND BAR offset attributes against calculated valuesChristian Geddes2019-04-183-113/+118
| | | | | | | | | | | | | | | | | | | | | | | | | While setting up the virtual memory mapped IO to the OCMB chips we make some assumptions that the OCMB MMIO spaces will be contiguous. The p9a_omi_setup_bars HWP uses OMI_INBAND_BAR_BASE_ADDR_OFFSET to set the scom registers that determine the physical offset mapped to the IO. When setting up the Virtual addresses hostboot uses to represent the physical mmio address, we must validate that the attribute matches with what we calculated. While doing this we found that the virtual address attribute was being calculated incorrectly. It was not localizing the OCMB position relative to the MC which is required when calculating the offset into the MC bar. Change-Id: I0ebbcd38e19a238e2cc16791bb0595536788bb7f RTC: 201493 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75631 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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