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| author | Matt Derksen <mderkse1@us.ibm.com> | 2019-04-25 13:21:38 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2019-04-30 12:52:20 -0500 |
| commit | 6c39a01069eceea95e0637d5d943aa80f8b3e0a0 (patch) | |
| tree | 442f38752001d3fd4fbb882ab573ea81a217db7f /src/usr | |
| parent | 3b13a6483b18a93d67b36c5a28d07415212a6995 (diff) | |
| download | talos-hostboot-6c39a01069eceea95e0637d5d943aa80f8b3e0a0.tar.gz talos-hostboot-6c39a01069eceea95e0637d5d943aa80f8b3e0a0.zip | |
Compile Gemini hardware procedures in hostboot
This is just the start of importing/compiling
the Gemini hardware procedures.
This commit compiles the helper functions in mss library,
and then compiles/calls gem_draminit in istep 13.
Change-Id: I837a5d8507c882c41650d06bccfcf25cd11688c8
RTC:204647
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76522
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Glenn Miles <milesg@ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr')
| -rwxr-xr-x | src/usr/fapi2/fapi2.mk | 5 | ||||
| -rw-r--r-- | src/usr/isteps/istep13/call_mss_draminit.C | 268 | ||||
| -rw-r--r-- | src/usr/isteps/istep13/makefile | 8 | ||||
| -rw-r--r-- | src/usr/isteps/mss/makefile | 11 |
4 files changed, 211 insertions, 81 deletions
diff --git a/src/usr/fapi2/fapi2.mk b/src/usr/fapi2/fapi2.mk index c69d77c92..ebad0987c 100755 --- a/src/usr/fapi2/fapi2.mk +++ b/src/usr/fapi2/fapi2.mk @@ -128,6 +128,9 @@ FAPI2_ERROR_XML += $(wildcard \ $(ROOTPATH)/src/import/chips/ocmb/explorer/procedures/xml/error_info/*.xml) FAPI2_ERROR_XML += $(wildcard \ $(ROOTPATH)/src/import/chips/p9a/procedures/xml/error_info/*.xml) +FAPI2_ERROR_XML += $(wildcard \ + $(ROOTPATH)/src/import/chips/ocmb/gemini/procedures/xml/error_info/*.xml) + # Attribute XML files. FAPI2_ATTR_XML += $(wildcard \ @@ -140,6 +143,8 @@ FAPI2_ATTR_XML += $(wildcard \ $(ROOTPATH)/src/import/generic/procedures/xml/attribute_info/*.xml) FAPI2_ATTR_XML += $(wildcard \ $(ROOTPATH)/src/import/chips/ocmb/explorer/procedures/xml/attribute_info/*.xml) +FAPI2_ATTR_XML += $(wildcard \ + $(ROOTPATH)/src/import/chips/ocmb/gemini/procedures/xml/attribute_info/*.xml) # Filter out Temp defaults XML file from Attribute XML files. # NOTE: The hb_temp_defaults.xml file is not a normal attribute file with the diff --git a/src/usr/isteps/istep13/call_mss_draminit.C b/src/usr/isteps/istep13/call_mss_draminit.C index 915bc992b..6eed78587 100644 --- a/src/usr/isteps/istep13/call_mss_draminit.C +++ b/src/usr/isteps/istep13/call_mss_draminit.C @@ -47,14 +47,22 @@ //From Import Directory (EKB Repository) #include <fapi2.H> -#include <p9_mss_draminit.H> -#include <p9c_mss_draminit.H> +#include <config.h> +#ifndef CONFIG_AXONE + #include <p9_mss_draminit.H> + #include <p9c_mss_draminit.H> +#else +#include <chipids.H> +// @todo RTC 207856 #include <exp_draminit.H> + #include <gem_draminit.H> +#endif #ifdef CONFIG_NVDIMM // NVDIMM support #include <isteps/nvdimm/nvdimm.H> #endif + using namespace ERRORLOG; using namespace ISTEP; using namespace ISTEP_ERROR; @@ -62,8 +70,49 @@ using namespace TARGETING; namespace ISTEP_13 { +// Declare local functions +void nimbus_mss_draminit(IStepError & io_istepError); +void cumulus_mss_draminit(IStepError & io_istepError); +void axone_mss_draminit(IStepError & io_istepError); +void mss_post_draminit( IStepError & io_stepError ); -void mss_post_draminit( IStepError & io_stepError ) +void* call_mss_draminit (void *io_pArgs) +{ + IStepError l_stepError; + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit entry" ); + auto l_procModel = TARGETING::targetService().getProcessorModel(); + + switch (l_procModel) + { + case TARGETING::MODEL_CUMULUS: + cumulus_mss_draminit(l_stepError); + break; + case TARGETING::MODEL_AXONE: + axone_mss_draminit(l_stepError); + break; + case TARGETING::MODEL_NIMBUS: + nimbus_mss_draminit(l_stepError); + break; + default: + assert(0, "call_mss_draminit: Unsupported model type 0x%04X", + l_procModel); + break; + } + + // call POST_DRAM_INIT function, if nothing failed above + if( INITSERVICE::spBaseServicesEnabled() && + (l_stepError.getErrorHandle() == nullptr) ) + { + mss_post_draminit(l_stepError); + } + + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit exit" ); + + return l_stepError.getErrorHandle(); +} + +void mss_post_draminit( IStepError & io_stepError ) { errlHndl_t l_err = NULL; bool rerun_vddr = false; @@ -144,14 +193,11 @@ void mss_post_draminit( IStepError & io_stepError ) return; } -void* call_mss_draminit (void *io_pArgs) +#ifndef CONFIG_AXONE +void nimbus_mss_draminit(IStepError & io_istepError) { errlHndl_t l_err = NULL; - IStepError l_stepError; - - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit entry" ); - // Get all MCBIST targets TARGETING::TargetHandleList l_mcbistTargetList; getAllChiplets(l_mcbistTargetList, TYPE_MCBIST); @@ -191,12 +237,12 @@ void* call_mss_draminit (void *io_pArgs) ErrlUserDetailsTarget(l_mcbist_target).addToLog(l_err); // Create IStep error log and cross reference to error that occurred - l_stepError.addErrorDetails( l_err ); - - break; + io_istepError.addErrorDetails( l_err ); // Commit Error errlCommit( l_err, HWPF_COMP_ID ); + + break; } else { @@ -206,85 +252,147 @@ void* call_mss_draminit (void *io_pArgs) } } // endfor mcbist's +} +void cumulus_mss_draminit(IStepError & io_istepError) +{ + errlHndl_t l_err = NULL; + + // Get all Centaur targets + TARGETING::TargetHandleList l_membufTargetList; + getAllChips(l_membufTargetList, TYPE_MEMBUF); - if(l_stepError.getErrorHandle() == NULL) + for (const auto & l_membufTarget : l_membufTargetList ) { - // Get all Centaur targets - TARGETING::TargetHandleList l_membufTargetList; - getAllChips(l_membufTargetList, TYPE_MEMBUF); - - for (TargetHandleList::const_iterator - l_membuf_iter = l_membufTargetList.begin(); - l_membuf_iter != l_membufTargetList.end(); - ++l_membuf_iter) + TARGETING::TargetHandleList l_mbaTargetList; + getChildChiplets(l_mbaTargetList, l_membufTarget, TYPE_MBA); + + for (const auto & l_mbaTarget : l_mbaTargetList ) { - // make a local copy of the target for ease of use - TARGETING::Target* l_pCentaur = *l_membuf_iter; - - TARGETING::TargetHandleList l_mbaTargetList; - getChildChiplets(l_mbaTargetList, - l_pCentaur, - TYPE_MBA); - - for (TargetHandleList::const_iterator - l_mba_iter = l_mbaTargetList.begin(); - l_mba_iter != l_mbaTargetList.end(); - ++l_mba_iter) - { - // Make a local copy of the target for ease of use - TARGETING::Target* l_mbaTarget = *l_mba_iter; - - // Dump current run on target - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "Running p9c_mss_draminit HWP on " - "target HUID %.8X", TARGETING::get_huid(l_mbaTarget)); - - // call the HWP with each target - fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget); - - FAPI_INVOKE_HWP(l_err, p9c_mss_draminit, l_fapi_mba_target); - - // process return code. - if ( l_err ) - { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR 0x%.8X : p9c_mss_draminit HWP returns error", - l_err->reasonCode()); - - // capture the target data in the elog - ErrlUserDetailsTarget(l_mbaTarget).addToLog(l_err); - - // Create IStep error log and cross reference to error that occurred - l_stepError.addErrorDetails( l_err ); - - // Commit Error - errlCommit( l_err, HWPF_COMP_ID ); - - break; - } - else - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "SUCCESS running p9c_mss_draminit HWP on " - "target HUID %.8X", TARGETING::get_huid(l_mbaTarget)); - } - - } - } + // Dump current run on target + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Running p9c_mss_draminit HWP on " + "target HUID %.8X", TARGETING::get_huid(l_mbaTarget)); - } + // call the HWP with each target + fapi2::Target <fapi2::TARGET_TYPE_MBA_CHIPLET> l_fapi_mba_target(l_mbaTarget); + + FAPI_INVOKE_HWP(l_err, p9c_mss_draminit, l_fapi_mba_target); + + // process return code. + if ( l_err ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : p9c_mss_draminit HWP returns error", + l_err->reasonCode()); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_mbaTarget).addToLog(l_err); + + // Create IStep error log and cross reference to error that occurred + io_istepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, HWPF_COMP_ID ); + + break; + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS running p9c_mss_draminit HWP on " + "target HUID %.8X", TARGETING::get_huid(l_mbaTarget)); + } + } // end MBA loop + } // end MEMBUF loop +} - // call POST_DRAM_INIT function - if(INITSERVICE::spBaseServicesEnabled()) +#else +void nimbus_mss_draminit(IStepError & io_istepError) +{ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Error: Trying to call 'p9_mss_draminit' but Nimbus code is not compiled in"); + assert(0, "Calling wrong Model's HWPs"); +} + +void cumulus_mss_draminit(IStepError & io_istepError) +{ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Error: Trying to call 'p9c_mss_draminit' but Cumulus code is not compiled in"); + assert(0, "Calling wrong Model's HWPs"); +} +#endif + +#ifdef CONFIG_AXONE +void axone_mss_draminit(IStepError & io_istepError) +{ + errlHndl_t l_err = NULL; + + // Get all OCMB targets + TARGETING::TargetHandleList l_ocmbTargetList; + getAllChips(l_ocmbTargetList, TYPE_OCMB_CHIP); + + bool isGeminiChip = false; + for ( const auto & l_ocmb : l_ocmbTargetList ) { - mss_post_draminit(l_stepError); - } + fapi2::Target <fapi2::TARGET_TYPE_OCMB_CHIP> l_fapi_ocmb_target(l_ocmb); - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_mss_draminit exit" ); + // check EXPLORER first as this is most likely the configuration + uint32_t chipId = l_ocmb->getAttr< TARGETING::ATTR_CHIP_ID>(); + if (chipId == POWER_CHIPID::EXPLORER_16) + { + isGeminiChip = false; + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Running exp_draminit HWP on target HUID 0x%.8X", + TARGETING::get_huid(l_ocmb) ); + //@todo RTC 207856: FAPI_INVOKE_HWP(l_err, exp_draminit, l_fapi_ocmb_target); + } + else + { + isGeminiChip = true; + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Running gem_draminit HWP on target HUID 0x%.8X, chipId 0x%.4X", + TARGETING::get_huid(l_ocmb), chipId ); + FAPI_INVOKE_HWP(l_err, gem_draminit, l_fapi_ocmb_target); + } - return l_stepError.getErrorHandle(); + // process return code. + if ( l_err ) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR 0x%.8X : %s_draminit HWP returned error", + l_err->reasonCode(), isGeminiChip?"gem":"exp"); + + // capture the target data in the elog + ErrlUserDetailsTarget(l_ocmb).addToLog(l_err); + + // Create IStep error log and cross reference to error that occurred + io_istepError.addErrorDetails( l_err ); + + // Commit Error + errlCommit( l_err, HWPF_COMP_ID ); + + break; + } + else + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "SUCCESS running %s_draminit HWP on target HUID 0x%.8X", + isGeminiChip?"gem":"exp", TARGETING::get_huid(l_ocmb) ); + } + } // end of OCMB loop } +#else + +void axone_mss_draminit(IStepError & io_istepError) +{ + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "Error: Trying to call 'exp_draminit' or 'gem_draminit' but Axone code is not compiled in"); + assert(0, "Calling wrong Model's HWPs"); +} + +#endif + }; diff --git a/src/usr/isteps/istep13/makefile b/src/usr/isteps/istep13/makefile index 507d1981d..57a83e567 100644 --- a/src/usr/isteps/istep13/makefile +++ b/src/usr/isteps/istep13/makefile @@ -30,7 +30,7 @@ CEN_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/centaur/procedures OCMB_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/ocmb/procedures EXP_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/ocmb/explorer/procedures EXP_INCLUDE_PATH = ${ROOTPATH}/src/import/chips/ocmb/explorer/common/include/ - +GEM_PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/ocmb/gemini/procedures #Add all the extra include paths EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2 @@ -65,6 +65,9 @@ EXTRAINCDIR += ${EXP_INCLUDE_PATH}/ EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/ EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/chips/ocmb/explorer/procedures/hwp/memory/lib/ EXTRAINCDIR += ${ROOTPATH}/obj/genfiles/generic/memory/lib/ +EXTRAINCDIR += ${GEM_PROCEDURES_PATH}/hwp/memory +EXTRAINCDIR += ${GEM_PROCEDURES_PATH}/hwp/memory/lib/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils # from src/usr/isteps/istep13 OBJS += call_host_disable_memvolt.o @@ -130,9 +133,11 @@ include ${CEN_PROCEDURES_PATH}/hwp/initfiles/centaur_mba_scom.mk include ${CEN_PROCEDURES_PATH}/hwp/initfiles/centaur_ddrphy_scom.mk include ${CEN_PROCEDURES_PATH}/hwp/memory/p9c_mss_row_repair.mk + OBJS += $(if $(CONFIG_AXONE),exp_scominit.o,) OBJS += $(if $(CONFIG_AXONE),explorer_scom.o,) OBJS += $(if $(CONFIG_AXONE),exp_draminit_mc.o,) +OBJS += $(if $(CONFIG_AXONE),gem_draminit.o,) include ${ROOTPATH}/config.mk @@ -149,4 +154,5 @@ VPATH += ${CEN_PROCEDURES_PATH}/hwp/memory/lib/utils/ VPATH += ${CEN_PROCEDURES_PATH}/hwp/initfiles VPATH += $(if $(CONFIG_AXONE),${EXP_PROCEDURES_PATH}/hwp/memory,) +VPATH += $(if $(CONFIG_AXONE),${GEM_PROCEDURES_PATH}/hwp/memory,) VPATH += $(if $(CONFIG_AXONE),${OCMB_PROCEDURES_PATH}/hwp/initfiles/,) diff --git a/src/usr/isteps/mss/makefile b/src/usr/isteps/mss/makefile index 6a97664c9..8b3c959f0 100644 --- a/src/usr/isteps/mss/makefile +++ b/src/usr/isteps/mss/makefile @@ -28,6 +28,7 @@ IMPORT_PATH = ${ROOTPATH}/src/import PROCEDURES_PATH = ${IMPORT_PATH}/chips/p9/procedures AXONE_PROCEDURES_PATH = ${IMPORT_PATH}/chips/p9a/procedures EXPLORER_PROCEDURES_PATH = ${IMPORT_PATH}/chips/ocmb/explorer/procedures +GEMINI_PROCEDURES_PATH = ${IMPORT_PATH}/chips/ocmb/gemini/procedures #Add all the extra include paths EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include @@ -84,6 +85,9 @@ MSS_LIB += ${EXPLORER_PROCEDURES_PATH}/hwp/memory/lib/fir/ MSS_LIB += ${EXPLORER_PROCEDURES_PATH}/hwp/memory/lib/mcbist/ MSS_LIB += ${EXPLORER_PROCEDURES_PATH}/hwp/memory/lib/phy/ MSS_LIB += ${EXPLORER_PROCEDURES_PATH}/hwp/memory/lib/ecc/ +MSS_LIB += ${GEMINI_PROCEDURES_PATH}/hwp/memory/ +MSS_LIB += ${GEMINI_PROCEDURES_PATH}/hwp/memory/lib/ + EXTRAINCDIR += ${MSS_LIB} @@ -200,7 +204,14 @@ MSS_PATH_EXPLORER := $(EXPLORER_PROCEDURES_PATH)/hwp/memory/lib MSS_EXPLORER_SOURCE := $(shell find $(MSS_PATH_EXPLORER) -name '*.C' -exec basename {} \;) #must bring explorer_memory_size.o in even in Nimbus/Cumulus builds because of p9_mss_grouping nest HWP MSS_MODULE_OBJS += $(if $(CONFIG_AXONE),$(patsubst %.C,%.o,$(MSS_EXPLORER_SOURCE)),explorer_memory_size.o) + +MSS_PATH_GEMINI := $(GEMINI_PROCEDURES_PATH)/hwp/memory/lib +MSS_GEMINI_SOURCE := $(shell find $(MSS_PATH_GEMINI) -name '*.C' -exec basename {} \;) +MSS_MODULE_OBJS += $(if $(CONFIG_AXONE),$(patsubst %.C,%.o,$(MSS_GEMINI_SOURCE)),) + + MODULE = isteps_mss + OBJS += $(MSS_MODULE_OBJS) $(call BUILD_MODULE) |

