summaryrefslogtreecommitdiffstats
path: root/src/usr/targeting
Commit message (Collapse)AuthorAgeFilesLines
...
* Auto-arm the NVDIMMs at runtimeCorey Swenson2019-06-242-0/+19
| | | | | | | | | | | | | | Add control attribute and auto-arm NVDIMMs when OCC is enabled at runtime. Change-Id: I2e897e25f83b3c0ff51ddbaf3d922f07156d5747 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79069 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Run exp tests in Axone and make generic Load utilityMatt Derksen2019-06-242-0/+15
| | | | | | | | | | | | | | | | | | | Removed CONFIG_AXONE_BRING_UP from expscomtest.H Added common load utility for loading/unloading needed modules for testcases. Added a mutex to avoid inband command/response contention between testcases. Change-Id: Ia96991983be18fab840b59b8dc7dd1383ecc4abc RTC:201738 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76818 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move the NVDIMM_ARMED attribute from PROC to DIMM typeCorey Swenson2019-06-212-11/+5
| | | | | | | | | | | | | | | | The attribute holds status for armed/occ_active/errors. As DIMM type it will more accurately reflect nvdimm status. Removed the workaround using the scratch register. RTC:211510 Change-Id: I8a1c686773fc7d9ba4d2788dc788764f5170c136 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79068 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Unit test for structure TARGETING::AttributeTank::AttributeRoland Veloz2019-06-213-1/+1732
| | | | | | | | | | | | This unit test, exercises the Attribute API, and the make attribute templates Change-Id: Iab9072f25c7920eb7f135c52e79198efdb755719 RTC:208343 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78795 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Force appropriate values for NPU configDan Crowell2019-06-201-0/+69
| | | | | | | | | | | | | | Hostboot will do no configuration of the NPUs during boot. Instead all of the configuration will happen at the OS level. Change-Id: I78c0bd06053524e9af981f1175c05281e5fdced4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78181 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Handle NVDIMM encryption errorsCorey Swenson2019-06-182-12/+51
| | | | | | | | | | | | Update ATTR_NVDIMM_ARMED and ATTR_NV_STATUS_FLAG Update notifyNvdimmProtectionChange() Set encryption error and check before arm/disarm Change-Id: I1edf738af3460684ee93b02f06ff417c3e72d4e3 RTC:210689 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78828 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* MRW parsing for DDIMM, PMIC, and OCMB_CHIPChen Du2019-06-181-44/+119
| | | | | | | | | | | | | | | | | | | The way we are currently generating FAPI_POS and FAPI_NAME for DIMM, PMIC, and OCMB_CHIP for axone is incorrect. Currently swift.xml only contains 12 dimms per proc, 12 ocmb_chips per proc, and 24 pmics per proc, but P9A can technically support up to 16, 16, and 32, respectively. The FAPI_POS needs to reflect the upper bound of these values. Change-Id: I4c8efe4426f0ff976cc9e9c23ee461549e89f5f7 RTC: 172971 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78768 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Reworked the AttributeTank::Attribute APIRoland Veloz2019-06-121-120/+119
| | | | | | | | | | | | | | | | | | | | | | | Once I made the Attribute structure public, I exposed the API. It was no longer sufferance to allow users to just modify the properties of the structure openly. It was time to encapsulate the data and provide a proper API. Removed the 'virtual' keyword from the class AttributeTank. This class is not being used polymorphically any where, therefore the keyword 'virtual' was just adding to it's memory size foot print for no reason. Change-Id: I073aa5dbef1eba911afb95392de5e580f6aac100 RTC:208343 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78756 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update DIMM's 0-8 EEPROM_VPD_PRIMARY_INFO to match the corresponding OCMBsChristian Geddes2019-06-111-38/+38
| | | | | | | | | | Somewhere along the line we updated the OCBM's i2c information but never updated the dimms. This resulted in the eeproms being cached twice. Change-Id: Ia58d624c3711e22ad5eaaccc8aa39be2b6c23ca4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78775 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Update non-present dimm/ocmb i2c attributesChristian Geddes2019-06-101-102/+113
| | | | | | | | | | | | | | | | | The dimm/ocmb i2c information should match up, especially for the VPD_PRIMARY attribute. Also we had a problem where the settings we had for the dimm target was getting targets that were not present in the simics model showing up present to hostboot. By forcing targets we no should not show up to have invalid devAddr fields set in the attribute, we avoid having targets show up when they should not. Change-Id: I3002e81d39ec78f3ba25c22ce9d29e718ee68df1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78415 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add OMI BAR calculations to MRW scriptsChen Du2019-06-102-0/+41
| | | | | | | | | | | | | | | | | | | | Need to set the OMI attribute OMI_INBAND_BAR_BASE_ADDR_OFFSET The algorithm to determine this attribute is explained in src/usr/mmio/mmio.C Each OMI BAR is an offset from the base (0x0006030200000000) The offset for an even OMI is every 8 gigabytes The offset for an odd OMI is 2 gigabytes after the preceding even OMI Change-Id: I08973e0b2952a6ea32dbf4b95ad00cf5bbe92484 RTC: 210315 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77742 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* MRW parsing for DDIMM, PMIC, and Axone OBUSChen Du2019-06-103-102/+402
| | | | | | | | | | | | | | | | | | | | | | Task 3: Deal with dimm, pmic, and obus Code parses out pmic and dimm because of their parent/child relationship. The primary thing to note is how the affinity path is calculated. It differs depending on how the praent/child relationships are set up. For PMIC, there are 4 PMICs per OMI whereas for DIMM, there are two DIMMs per OMI. Also handles OBUS and OBUS_BRICK. OBUS_BRICK new layout is now 2 bricks for OBUS0, 1 brick for OBUS1, 1 brick for OBUS2, and 2 bricks for OBUS3 Change-Id: I581320f551479a40dddb77550e9440e8edfd373f RTC: 172971 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76804 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* NVDIMM encryption HW function supportCorey Swenson2019-06-031-1/+1
| | | | | | | | | | | | | | | | | | Update random number generation, IPL and runtime. Write encryption regs to enable nvdimm encryption, crypto-erase, disable encryption. Read config-status reg to verify encryption state. Change-Id: I25625b53f90eeb542767fa729ebb47f8f8455a4b RTC:201474 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77321 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Remove 'EXPLORER' as attribute MODEL typeMike Baiocchi2019-05-312-5/+1
| | | | | | | | | | | | | | | | | | | This is a follow-on commit where the Explorer and Gemini targets were made to share a common 'OCMB' MODEL type. The 'EXPLORER' MODEL type can now be removed as the differnt OCMBs can be distinguished by their CHIP_IDs. Change-Id: Id38b91da2e8202e442b77e9373e449350d3c9b68 RTC:210226 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78084 Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates to compile new pmic fields in p9a eff_configMatt Derksen2019-05-291-1/+3
| | | | | | | | | | | | | | Added to support updates to p9a_eff_config.C Change-Id: I7424447a57b65ccdc2835dfdb2ec5dcef72b0f53 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77810 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Refactor keyword support for various DIMM typesMatthew Raybuck2019-05-291-1/+1
| | | | | | | | | | | | | | | | | | | | | The existing keyword logic didn't use bitmasking when searching for the correct keyword entry. This commit refactors the code to allow for bitmasking and changing the NA module specific keyword to mean that no keyword was found for the given target rather than its previous ambiguous meaning that could be confused with the ALL module specific keyword. Change-Id: I661b70c4eff2740911cd63f8c1042ee8a084d63a RTC:203788 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77357 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Document Axone NPU configurationDan Crowell2019-05-295-258/+496
| | | | | | | | | | | | | | | | | | | - Updated simics_AXONE.system.xml with the valid target configuration that we should be using for NPUs in Axone. - Updated target xml files as well - Corrected 1 PG rule that no longer applies - Also modified the OBUS_BRICK layout in simics_AXONE as well Change-Id: I05c68be027cd4da39afabee04fefbb266b87c5fb RTC: 208518 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76510 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Clean up traces seen during Axone IPLsChristian Geddes2019-05-293-3/+3
| | | | | | | | | | | | | | | | | | This commit is an audit of the traces that have been added in Axone. This commit should remove ~32,000 lines of traces from hbTracMERG which were result from a few poorly placed trace statements. Also in this commit a few xml attribute are fixed which were causing errant traces. Change-Id: I6ddcfa449aa94e1c661dcf08ec1482be1d5b4b14 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77754 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable MMIO scom after OMI is initializedChristian Geddes2019-05-291-0/+3
| | | | | | | | | | | | | | | | | | In istep 12.13 during Axone IPL we initialize the Open Capi Memory Interface (OMI). Once this is initialized we can route all scoms through the more efficient inband MMIO path. Change-Id: I3b94f6800986b0cca26f060f4c3f0193df1e761a RTC: 206384 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76749 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Combine 'generic' and 'explorer' OCMB chip targetsMike Baiocchi2019-05-162-34/+28
| | | | | | | | | | | | | | | | | | This commit moves the Explorer-specific OCMB_CHIP target into the 'generic' OCMB_CHIP target so that there is only one target. This target will also be used for Gemini. Changes were also made to look for Gemini vs Explorer where appropriate based on ATTR_CHIP_ID. Change-Id: I91b79195bf997a6af4e2ae0a3326ed5a1c7887ec RTC:205563 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77220 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* MRW parsing updates for Axone+UB task 2Chen Du2019-05-152-35/+227
| | | | | | | | | | | | | | | | | | | | | | Task 2: Deal with chip-ocmb Code parses out chip-ocmb information from the swift.xml and checks for validity of the data. Code processed the correct affinity path based on a modulo algorithm. All other information was taken from our current simics_AXONE.system.xml Code also parses the i2c_mux information because it highly correlates with the chip-ocmb Change-Id: I97ce375280c268837135fd16c13399f662f1c8dc RTC: 196808 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75673 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* MRW parsing updates for Axone+UBChen Du2019-05-152-2/+166
| | | | | | | | | | | | | | | | | | | Task 1: Deal with axone processor and its subunits Code handles CHIPLET_ID correctly for new types OMI, OMIC, MCC along with the OMIC_PARENT path. Code also removes any instances of OMI with OMIC parent because we only want to display OMI with MCC parent. Change-Id: I101c6f5935ea2bb25ec47d7ae732f472bb0d0e39 RTC:172971 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73681 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* PRD: replaced MODEL_EXPLORER with MODEL_OCMBZane Shelley2019-05-151-0/+4
| | | | | | | | | | | | | | | | In addition, ensured PRD doesn't assert if there is a Gemini, in which we have no functional support. Change-Id: Id293b48005fc044102ce2bfa768fec05e3102dcd Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77271 Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: Brian J. Stegmiller <bjs@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
* Add logic to compute MSS_MRW_NVDIMM_SLOT_POSITION for ZZDan Crowell2019-05-131-0/+12
| | | | | | | | | | | | | | | | | | | There are a variety of ways to number dimms. For NVDIMMs there is a system property that defines which positions we are allowed to install the dimms in (ATTR_MSS_MRW_NVDIMM_PLUG_RULES). Because of the inconsistent numbering schemes we have explicitly defined a new attribute on the dimm that corresponds to the system plug rules. Change-Id: If935e29eb108a6a922d8c1f7c69fdc12580c5958 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77239 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add NVDIMM key attributes and generate keysCorey Swenson2019-05-112-0/+75
| | | | | | | | | | | | | | | | 3 keys, 32 bytes each, random numbers generated by TPM hardware. 2 attributes for keys, 1 stored in FW 1 stored in anchor card. 1 attribute for enable/disable encryption. Change-Id: Ie3c258f06204e68c2d65b8d5fea294da5264d597 RTC:208342 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76126 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Revisit attributes with array types.Luis Fernandez2019-05-093-29/+196
| | | | | | | | | | | | | | | Use std::array to set and get attributes' value that support array. Change-Id: I9dc31bbca5ad0c56add353c6d4233296d2bb200a RTC: 110583 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76347 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Targeting updates for EEPROM content typeMatthew Raybuck2019-05-093-21/+442
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds a new enumerationType called EEPROM_CONTENT_TYPE as well as a new field to the EEPROM_VPD_PRIMARY_INFO and EEPROM_VPD_BACKUP_INFO called eepromContentType. EEPROM_CONTENT_TYPE serves to define the constants for the five types of eeprom content types; they are: RAW, DDIMM, ISDIMM, IBM_FRUVPD, and IBM_MVPD. There are five targetTypes that default eepromContentType to the appropriate value for that targetType; they are: PROC, OCMB, NODE, LCARD_DIMM, MCS. Due to the limitations of targeting, an enumeration type can't be used with complexTypes. Instead, eepromContentType matches the values of the five types defined by EEPROM_CONTENT_TYPE. This commit is used to support Part and Serial Number lookups when deciding EEPROM cache content updates. Change-Id: Ie8f1e81ff7273c76178c5c621771d5b6c75903e9 RTC:203788 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76855 Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update simbuild for axone simics bringupGlenn Miles2019-05-071-9/+9
| | | | | | | | | | | | | | | | | | | | | The XML for the RAM1 register was not being parsed correctly resulting in too few registers being allocated in uchip_regs.chip not defining all of the registers. This latest build adds those registers manually until the parser can be fixed. This build also sets the POR values for the RAM1 registers. Also changes OCMB I2C addresses to 0x40 Change-Id: Icd2df80874200741d82fc152cb4b8bdbc75c5bed Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76764 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set i2c slave's port correctly in Axone XML for OCMB targetsChristian Geddes2019-05-071-34/+50
| | | | | | | | | | | | | | | | We had ocmbs0-7 pointing at port 0, when according to the simics model these should be port 1. Also we have ocmb8 set incorrectly, according to the simics model this should be port 0 but instead we had it set to port 1. This commit addresses these issues. Change-Id: I7eb0baeb5a7725f0da3452b121d07690bfb73cb0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76900 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to p9a_omi_io_dccal in istep 12.6Christian Geddes2019-05-011-0/+64
| | | | | | | | | | | | | | | | | | As per the P9A IPL Flow document we must call p9a_omi_dccal in istep 12.6 during axone IPLs after we have called p9a_omi_io_scominit. Update XML to set approriate OMI_DL_GROUP_POS attribute settings on OMIs. This was done using the mapping described in the description of the FAPI attribute to map the CHIP_UNIT to this group pos. Change-Id: Ib48967b0b830ddf43b0028b978fca19d6ad9be8f RTC: 195554 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72971 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support writable ATTR_FREQ_MCA_MHZ for AxoneDan Crowell2019-04-302-1/+28
| | | | | | | | | | | | | | | | | ATTR_FREQ_MCA_MHZ is being reused on Axone to drive the memory clocks out to the OMIs. Previously this value was locked to the NEST/PB frequency so the value was constant. Change-Id: I4ab7625c2e22efc83ad63a463ebbb208392209ff Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76315 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add FAPI_POS and account for 4 possible PMIC targetsMatt Derksen2019-04-242-84/+137
| | | | | | | | | | | | | | | | | Forgot to add FAPI_POS with original PMIC target commit. New DIMMs will support 4 PMIC targets, so update simics_AXONE based on that information. Change-Id: I36b966ce7b57f0c1d7124893c5d487f34797b9d7 RTC: 206184 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76173 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Revert "Add OCMB_CHIP_TYPE Attribute"Michael Baiocchi2019-04-192-36/+0
| | | | | | | | | | | | | | This reverts commit 0da6ad912fdfae1b8d3ed8e117beede01365fc04. Change-Id: I4fdf24bdb25a2cd99279d064d2647aac27e6b4a6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76160 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move MSS MRW attributes to generic XMLLouis Stermole2019-04-192-7/+0
| | | | | | | | | | | | | | | | Change-Id: I13c4b88523b4ebda84193dd711f0fbb0772672f7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71436 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71465 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add new PMIC target for AxoneMatt Derksen2019-04-184-4/+782
| | | | | | | | | | | | | | | | PMIC is a voltage regulator for the DDIMM. It supplies power to the OCMB and DIMM targets. Change-Id: I10c1b03169f53b070f521ec9cd60cdbd15c4a268 RTC:206184 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75136 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update OCMB 9-15 to have valid i2c and eeprom infoMatthew Raybuck2019-04-181-36/+148
| | | | | | | | | | | | | | | | | | | | | | | | | The simics model only has 9 valid ocmbs represented on the master processor. ocmbs 0-7 are behind a 1-8 MUX and ocmb 8 is directly connected. This leaves ocmbs 9-15 for us to fill out. The information must be valid enough to allow the code to process the targets correctly, but we must fake out some information for the the sake of the awkward simics model. We have decided that for ocmbs 9-11 we will match everything from ocmb8 except increment the devAddr of the I2C info attributes A2,A4,A6, D2,D4,D6. For ocmbs 12-15 we have picked a new port (2) and used the same dev addr increments. This slightly invalid data allows the code to have the targets show up as PRESENT but not FUNCTIONAL Change-Id: I3aec520a04e89829554c277a4cf02e1981b7ed84 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75999 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Validate OMI INBAND BAR offset attributes against calculated valuesChristian Geddes2019-04-181-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | While setting up the virtual memory mapped IO to the OCMB chips we make some assumptions that the OCMB MMIO spaces will be contiguous. The p9a_omi_setup_bars HWP uses OMI_INBAND_BAR_BASE_ADDR_OFFSET to set the scom registers that determine the physical offset mapped to the IO. When setting up the Virtual addresses hostboot uses to represent the physical mmio address, we must validate that the attribute matches with what we calculated. While doing this we found that the virtual address attribute was being calculated incorrectly. It was not localizing the OCMB position relative to the MC which is required when calculating the offset into the MC bar. Change-Id: I0ebbcd38e19a238e2cc16791bb0595536788bb7f RTC: 201493 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75631 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add OCMB_CHIP_TYPE AttributeMike Baiocchi2019-04-182-0/+36
| | | | | | | | | | | | | | | | This commit adds the OCMB_CHIP_TYPE attribute and its associated enumeration. It adds this attribute to the generic OCMB Chip target. Change-Id: I0d0dfacf418a0990329bf9882276e79c524bd192 RTC:205563 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76020 Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Test Cases for deconfig updates for AXONEMatthew Raybuck2019-04-122-0/+18
| | | | | | | | | | | | | | | | | Unit test cases for the MC->OMIC->OMI deconfig by association path. These test cases verify that deconfiguring an MC, OMIC, or an OMI will properly deconfig the other targets in the hierarchy. Change-Id: Ief665e76893a87324dc42fa66f8abd29190da30e RTC:196804 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70512 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* SMF: Logic For Creating Non-Secure HOMER Memory SpaceIlya Smirnov2019-04-121-0/+6
| | | | | | | | | | | | | | | | | | | For SMF to be enabled, HOMER requires a small amount of non-SMF (unsecure) memory where the "jump to Ultravisor" instruction can be put (to transition to UV mode). This commit sets up a region of non-secure memory space for that purpose. Change-Id: Ib91ec69f49a4e174e65f3c2aad337a68eaa0803b RTC: 205986 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70699 Reviewed-by: Prem Shanker Jha <premjha2@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update MAX_ALLOWED_DIMM_FREQ to support 3200 MHzChristian Geddes2019-04-101-0/+4
| | | | | | | | | | | | | | | | | Previously this attribute was defaulted to 2400 for all configs. For axone , in order to make the VPD that is exists in the model valid we must set this attribute to allow higher frequencies Change-Id: I209ea750e05814dd601a69dfab571d2f0da980bc Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75782 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Re-order i2c properties in Axone simics XML to align closer with simChristian Geddes2019-04-101-49/+49
| | | | | | | | | | | | | | | | | | | | In the simics model we have 9 OCMBs per processor, 8 behind MC01 that are behind an 1-to-8 MUX, and 1 behind MC23 that is directly attatched. Our XML was not portraying this correctly as it was showing that the directly attached OCMB was OCMB0, which according to our XML is behind MC01. This commit makes it so OCMBs 0-7 (behind MC01) have i2c attributes that say they are behind the mux. OCMB8 will be behind MC23 and will be the directly attached OCMB. Change-Id: I7ef0cba6021bccc07ca2ccfefa2e02c9ec68eba4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75555 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Chen Du <duchen@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Force UCD Updates on each IPLMike Baiocchi2019-04-081-2/+4
| | | | | | | | | | | | | | | | This commit updates the existing ATTR_UCD_MFR_REVISION_OVERRIDE to be non-zero such that it will force UCD updates on ZZ and Zeppelin systems on each IPL. Change-Id: I35e6aa7b990e45b16d2f3ce782c74f60d7668471 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75615 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HB Improvements: Fix compiler warnings on modern compilersLuis Fernandez2019-04-052-5/+11
| | | | | | | | | | | | | | | | Resolve warnings when compiling with gcc 4.8. Compiled with GCC 7.3, no more compile errors/warnings; build ends with caught exception from linker. This commit compiles with GCC 8.2, no more error/warnings; except for a linking warning. Change-Id: Ib5d7c2b5bd350edc76ee2c7de96896154cd44420 RTC: 202716 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72271 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Small cleanup of NVDIMM updateMatt Derksen2019-04-041-2/+3
| | | | | | | | | | | | | | | | | | Changes made based on review comments. - Needed to make some errors purely software errors. - Removed error if running on non-FSP system. - Make it clear that writeCycleTime is NOT used. Change-Id: Iac4acdda46bfcdb35c8ce7f3a1d1541f8c560957 RTC:202536 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75229 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set ATTR_MSS_INTERLEAVE_ENABLE to be 0xAF to allow all grouping sizesChristian Geddes2019-04-031-1/+1
| | | | | | | | | | | | | | | The eff_grouping code for axone is struggling to putting the 8 ddimms we have behind MC01 in the current axone simics model into groups <8. This change will allow all possible group sizes and allows the code to group these into 1 big group of 8. Change-Id: Ic9d48524f53883014ff57451b1265202d955ece4 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75227 Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Set REL_POS to 0 on all DIMM target in simics AxoneChristian Geddes2019-04-021-0/+64
| | | | | | | | | | | | | | | REL_POS was not set and therefore was defaulted to 0xFF. This was causing calculations done by the MSS code to be off. Change-Id: I879761be5a6625775bc0dcb4c38f97477678e6b1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75244 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Create Attribute to force UCD UpdatesMike Baiocchi2019-03-302-0/+20
| | | | | | | | | | | | | | | | This commit adds ATTR_UCD_MFR_REVISION_OVERRIDE such that a user can override the MFR_REVISION seen on a UCD device. This could then force a UCD flash update. Change-Id: I3d807b3ddf2c62752046953f0f3d1754d80da381 RTC:205982 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75179 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Make pci cache injection attributes writeableDan Crowell2019-03-251-1/+12
| | | | | | | | | | | | | | | | The value of the cache injection attributes is based on the MTM of the system, therefore the FSP needs to be able to write to the attributes. -ATTR_PROC_PCIE_CACHE_INJ_MODE -ATTR_PROC_PCIE_CACHE_INJ_THROTTLE Change-Id: Iae59c3a045146ce617a0535f457ea467826e9e24 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74880 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set MUX i2c slave port to be 1Christian Geddes2019-03-221-1/+1
| | | | | | | | | | | | | The i2c controller info attribute for the I2C Mux target had the port information set incorrectly. This commit addresses that and adds a debug trace that was helpful in figuring out this issue Change-Id: I34b5c920e8fe4f0f0ea68ce5aaf268095aab9886 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74864 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
OpenPOWER on IntegriCloud