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* Add new path in EEPROM device op to allow reading from new EECACHEChristian Geddes2019-02-161-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Recently a new EECACHE section was introduced to Hostboot. This section gets populated with a copy of every PRIMARY_VPD eeprom (someday could contain other eeprom roles also) during host_discover_targets. This commit add support to allow users to select where they want to perform their EEPROM device operation. If they pass CACHE to the deviceOp macro then a read will come from the pnor cache, writes will write to pnor cache and then also write to the eeprom HW. If HARDWARE is passed in then reads and writes will be directly done on the eeprom hardware. If AUTOSELECT is passed the code will check our cache to see if we have a copy of the eeprom in question, if we have a copy we will go the CACHE path, if no copy exists we will go the HARDWARE path. Along with this change some reorganization was done w/ the eeprom related files. RTC: 196805 Change-Id: If2c4e5d3e338a1a10780740c1a019eb4af003b73 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70822 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set simics xml to match simics model for OCMB port numberingChristian Geddes2019-02-151-7/+7
| | | | | | | | | | | | | | | | | There was a bug where the i2c controller information had the wrong port values for OCBM targets 2-8. Correct value for the port for these targets is 0. In the current axone simics model OCMB 0 is on port 1 and OCMBs 1-8 are behind a 8-1 mux on port 0. Port was correct for OCMB 0 and 1 but incorrect for 2-8. Change-Id: Id34a812e2f278d0bc90beb44ba26b0fec32d2087 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71700 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add EEPROM caching device opChristian Geddes2019-02-131-34/+174
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces a new EEPROM_CACHE deviceOp and registers the OCMB_CHIP, PROC, and DIMM targets to it. This is part of the larger effort to transition for a "VPD" cache to an "EEPROM" cache in pnor. The deviceOp is currently called in hwasPlat's platPresenceDetect if the target in question has a ATTR_EEPROM_VPD_PRIMARY_INFO associated with it. The layout for the new EECACHE section in pnor is defined in eepromCache_const.H. Essentially it is a header that contains an array of record headers that tell where in the EECACHE pnor section a given cached EEPROM can be found. All EEPROM targets will be allocated space in the EECACHE section but only present targets will have their cache filled in. RTC: 196805 Change-Id: I49c341c9784be04ddf0259bd444f06c9baf8c6f1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70520 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add call to p9a_ocmb_enable to istep 10.4Christian Geddes2019-02-111-0/+64
| | | | | | | | | | | | | | | | Per IPL Flow doc for P9 Axone, p9a_ocmb_enable needs to be called on all processors during istep 10.4 RTC: 195553 Change-Id: I50fa98959008cccfe0620c8bc6e62f33ee91c135 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71229 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Correct invalid HUID and chiplet id values for NPU targetsMatt Raybuck2019-02-081-2/+6
| | | | | | | | | | | | | | | | | | There was a bug for NPU targets would incorrectly have a HUID with a value indicating that they were of target type MC instead of target type NPU. This commit corrects that issue and gives the correct chiplet id for NPU targets. Change-Id: I543e80e1c0da7a02bef61f9657270684abc6e7c7 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71159 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates to processMrw.pl to fix erroneous chiplet idsMatt Raybuck2019-02-081-8/+176
| | | | | | | | | | | | | | | | | | In some mrw .xml files there are bugs where the some unit's chiplet ids were set to an incorrect value. This update to processMrw.pl will override whatever value is in that xml and correct it to the appropriate value for hostboot consumption. Change-Id: I88fbeb893bbbbbd6e0a88adea3041df822c6a70d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70742 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix deconfigure parent rollup policyMatt Derksen2019-01-313-46/+798
| | | | | | | | | | | | | | | | | | | Change to specifically designate if a target is allowed to be deconfigured by child rollup and if it should rollup to its parent. Need to cover the case where there are two different types of children and only one is allowed to rollup to the parent. Also prevent the deconfigure rollup from happening to the parent. Change-Id: I514876a46e9c8180e1fc99a969e0ca4247fbf2d9 CQ:SW454562 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70759 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set the I2C MUX bus selector in the i2cPresence functionRoland Veloz2019-01-301-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | - Expanded the i2cPresence API to take in the I2C MUX bus selector and the I2C MUX path. This will facilitate setting the bus selector within the i2cPresence function. - Set the I2C MUX bus selector in the i2cPresence function via the call to i2cAccessMux. - Simplified the i2cAccessMux API. It only takes in what it really uses. - Added several dump utility functions that are strictly there to dump certain data structures on an as needed basis. Was useful to have these utilities to see certain data structures but does not slow down the run time because the user must explicitly call them. - The structures that can get dumped are TARGETING::EepromVpdPrimaryInfo, eeprom_addr_t, TARGETING::FapiI2cControlInfo and I2C::misc_args_t. Change-Id: I14943687a934bfb21bc5cf3db0540b7e629a6257 RTC:203596 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71011 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Do not gard cores on the initial core wakeup failureDan Crowell2019-01-292-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | We have seen rare (but non-zero) errors during slave core wakeup where we never see the new core reporting in. Currently this will result in a visible log and a core gard. However, there is currently no indication this failure is actually due to bad hardware. As a workaround, this commit adds an indicator that keeps track of if a core has failed wakeup previously. The first time we encounter the error there will be a visible log with a FW callout and no deconfig or gard of the core. That will trigger a boot failure and a reboot. If we don't fail on the next boot (which is expected), the counter will be cleared. If we do fail again there will be a visible log (with a new SRC) that calls out the core as the primary cause, plus does a deconfig+gard. Change-Id: I3a25537cf9c9c8e0b679519b67e9ae4e3492736d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70992 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set TPM model to be the x75 nuvoton for axone simicsChristian Geddes2019-01-241-0/+4
| | | | | | | | | | | | | | | | Current axone simics model has this as the x75. This might change but for now we will set it to be x75 in the hostboot xml so we dont get error logs. Change-Id: I7d86bb36cbb31fd4bae02a7e7f29bc3f385fd6d8 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70827 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Hieu C. Nguyen <hieu.nguyen@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Inform PHYP of NVDIMM protection by OCCMatt Derksen2019-01-244-14/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OCC is responsible for detecting the EPOW signal and triggering the save operation on the NVDIMM. Therefore, if the OCC is not running we are unprotected from a poweroff event. PHYP needs to inform the LPARs using the NV (non-volatile) memory of this state so they can behave accordingly. HBRT is responsible for telling PHYP when we get into this state. There are two ways we can detect this state: a) HBRT explicitly puts the PM complex into reset b) PRD detects a specific FIR bit The message should include this data: - what state we are in (protected or unprotected) - which processor is affected Work for this story will include: - Definition of the new message - Creating a utility function to send the message - Calling utility function to send 'unprotected' message inside of all pm reset paths at runtime Change-Id: Ib015d001d47883a247faedabedb0705ba0f1b215 RTC:201181 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68870 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add Support for Nuvoton 75x Model of TPMsMike Baiocchi2019-01-172-0/+20
| | | | | | | | | | | | | | | | | | This commit adds the ability for hostboot code to support the Nuvoton 75x TPMs along with the current support of the 65x models. A new attribute TPM_MODEL is used to configure the appropriate settings for each model. Change-Id: I14b0f6606a1a94d0ed300fd51bbf3f50e63dfb01 RTC:202356 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70464 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set the DIMM SPD sizeRoland Veloz2019-01-162-1/+18
| | | | | | | | | | | | | | | | | | | | - Created attribute DIMM_SPD_BYTE_SIZE to contain the DIMM SPD size - Added the attribute DIMM_SPD_BYTE_SIZE to target lcard-dimm so that all DIMMs get this attribute - Enumerated the sizes of DDR3, DDR4 and DDR5 for easy access and easy updates if necessary. - Added code in spd.C to set the size of the DIMM at presence detect Change-Id: Ia08fd41ef93f54f7f695c92e346e92bda8cd6d64 RTC: 202746 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70008 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Replace attribute I2C_MUX_INFO with attribute FAPI_I2C_CONTROL_INFORoland Veloz2019-01-155-106/+5
| | | | | | | | | | | | | | | -- Just removed all instances of I2C_MUX_INFO and replaced with FAPI_I2C_CONTROL_INFO if not already there. Change-Id: Ie161abb25ef75b632d6c429fb247ccbd04eb2135 RTC: 203024 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70022 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix EEPROM_VPD_PRIMARY_INFO attribute on proc targ in axone sim XMLChristian Geddes2019-01-141-4/+8
| | | | | | | | | | | | | | | | | | | | | | Up until this point in P9 systems this attribute has had the maxMemorySizeKB = 0x80 (128 KB) and the chipCount = 0x02. While this is partially true, hostboot should never access the 2nd 64 KB chip. The MVPD is completely stored in the first 64 KB chip. This commit intentionally does not fix previous system XMLs but it might be worth investigating. MRW is still supplying the old 0x80, 0x02 values for Nimbus/Cumuls system so it was decided to leave old values in our sim xmls for those systems. RTC: 196805 Change-Id: Ibec7412359b6cda24a255ec612a5774a7ed3ac30 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70259 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HTMGT: Clear OCC reset counts after an hourChris Cain2019-01-142-36/+36
| | | | | | | | | | | | | | | | | | - add HTMGT/OCC data to elogs - parse HTMGT/OCC data in elogs - add reset count per OCC since last boot - remove unused legacy pstate attributes/code Change-Id: I69f9fe504af13eae86ec423a329a7bc46286f906 RTC: 202016 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69717 Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Sheldon Bailey <baileysh@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* No parent rollup for OBUS childrenMatt Derksen2019-01-112-3/+13
| | | | | | | | | | | | | | | HWSV code is deconfiguring either SMPGROUP or OBUS_BRICKS under the OBUS. Need to prevent the deconfigures from also deconfiguring the parent OBUS. Change-Id: Ibca2766009b63582fcfa537139a078bef3a58f47 CQ:SW454103 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70322 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add presence detection for i2c mux targetsChristian Geddes2019-01-112-0/+12
| | | | | | | | | | | | | | | | | | | | | | | This commit removes the ddimm.C file that had the deviceFramework routing for OCMB presence detection and replaces it with a new file in src/usr/i2c/i2cTargetPres.C that is more generic for any target that has the FAPI_I2C_CONTROLLER_INFO attribute. The i2c_mux target also now uses this same code for its presence detection. As a result of this change the src/usr/i2c/mux_i2c.* files have also been removed. When getting rid of the ddimm.C file I had to put the IDEC device routing somewhere else so I moved it to the hwasPlat code where the other IDEC device routes are registered. RTC: 196805 Change-Id: I27e5e3e8d0fe107c3d44a450e20efa6f50fa0c5f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69944 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates to processMrw to fix Chiplet IdsMatt Raybuck2019-01-091-1/+11
| | | | | | | | | | | | | | | Update the process functions to correctly determine the appropriate chiplet id and set it for each target. Change-Id: Ice68d9424a8a3a3f2ef64e9c6a303ee289aa2768 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70118 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move NVDIMM Erase and Arm to RuntimeTsung Yeung2019-01-091-0/+45
| | | | | | | | | | | -Move erase and arm to after OCC has started -Address several TODOs in I2d68123ceb0b8e7a33b54f9acad0968670a67ea9 -Combine arm and erase into an atomic operation with ATOMIC_SAVE_AND_ERASE Change-Id: Iad06f6fe7128df3defc4ded57b0151f9c4b9d15e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68197 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Real OCMB presence detection support for Axone simicsChristian Geddes2019-01-082-17/+358
| | | | | | | | | | | | | | Previously a hacked up copy of OCMB presence detection that always returned that the OCMB was present. This commit will actually look up the VPD to determine if the OCMB is present or not. Change-Id: Id8c51587b9e5c63dfd68d2463f24aa419426d9ab Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69905 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Deconfigure parent if no more functioning children of child's typeMatt Derksen2019-01-081-1/+5
| | | | | | | | | | | | | | | | | | Defect discovered that a DIMM deconfig did not rollup to the membuf because the membuf also has an l4_centaur child. The fix is to check that the parent has no more children like the one being deconfigured. Also make sure that deconfiguring l4_centaur does not deconfigure its parent membuf. Change-Id: Ic499092d0da926dcd3e0c08f5205e491e04f9680 CQ:SW451955 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70093 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add ATTR_REL_POS to NIMBUS system xmlMatt Derksen2019-01-051-1/+185
| | | | | | | | | | | | | | ATTR_EFF_HYBRID and ATTR_EFF_HYBRID_MEMORY_TYPE use ATTR_REL_POS of dimms and mcas as index values. Need this update to avoid using default 0xFF value as an index. Change-Id: I71741bf4e0bd183fe65e1d14b1a53017df7053b6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70056 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* HB Axone simics model changes to support DDIMM SPD i2c accessRoland Veloz2018-12-183-8/+232
| | | | | | | | | | | | | | | | | | | | --- Added an I2C MUX target at engine 3, port 0, device address 0xE0 --- Added EEPROM_VPD_PRIMARY_INFO data to the DIMMs. This info also includes the I2C MUX target details to get to the MUX. EEPROM_VPD_PRIMARY_INFO fields: * byteAddrOffset set to 0x00 * chipCount set to 0x01 * maxMemorySizeKB set to 0x4000 (4 KB) * writeCycleTime set to 0x05 (5 ms) * writePageSize set to 0x20 --- Updated the I2C_BUS_SPEED_ARRAY attribute for target sys0node0proc0. Added speed 400 to array that corresponds to engine 3, port 0. Change-Id: Ia1965803a12f08e816b19d9d9a6fe2dfe3a2df36 RTC: 202358 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69835 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Fill in remaining dimms for simics_AXONE.system.xmlChristian Geddes2018-12-181-7/+247
| | | | | | | | | | | | | | | | | | Initial DIMM xmls was taken from cumulus where we skipped dimms due to memory pair testing. In axone it makes more sense to have use dimms 0-8 instead of 0,2,4,..14 Change-Id: I9d3c85e96415c0a7908c859697891da703ea8e9d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69902 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Add VPD_REC_NUM defaults for OCMB chips in Axone system xml for simChristian Geddes2018-12-171-0/+64
| | | | | | | | | | | | | | | This attribute defaults to 0xFFFF which causes errors if used in calculations Change-Id: I0e7fc211ed1c8c78e00c57a3f0adb138fe1ffedc RTC: 196805 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69573 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Axone Simics Updates -- Finds Functional Master ProcBill Hoffa2018-12-141-6/+6
| | | | | | | | | | | | | | | | | - Updates for new Simics infrastructure - Finds Functional Master Proc - Finds TPM - Boots to istep6.9 before failing target verification (more Axone FW changes needed) Change-Id: Ib3f44008ed12202777c2edacea42d5cb20a4a7a3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67206 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Defect - multiple SRCs generated on zz systemMatt Raybuck2018-12-141-0/+4
| | | | | | | | | | | | | | | | | There was a code update in prdfTargetServices.C that uses ATTR_POS_ON_MEM_PORT which was not being generated correctly on hostboot's side. This change will generate the proper value for POS_ON_MEM_PORT. Change-Id: I2a227cecfee94d282e17def105613257ca0b75a4 CQ:452234 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69630 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Hack to force OCMB presence detectionDan Crowell2018-12-131-63/+24
| | | | | | | | | | | | | | | | Temporary code that assumes the OCMB is present if the target is in the model. Also adds a check to throw an error instead of crashing if VPD_REC_NUM isn't set. Change-Id: Iba87d13093f0044bdf28a10621561e02d10faaf6 RTC: 196805 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68488 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Inband MMIO access to OCMBRick Ward2018-12-133-0/+106
| | | | | | | | | | | | | | | | | | This is an untested version of the new MMIO device driver that will give access to the OCMB. It will be tested once the Axone model IPLs in Simics. Change-Id: I4bc1d2f7306f1b238d1d65c24462ac4121266b11 RTC: 189447 RTC: 189220 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66941 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Default ASYNC_NEST_FREQ_MHZ to be 0xFFFF for Axone simics xmlChristian Geddes2018-12-101-0/+4
| | | | | | | | | | | | | | | In order to force Nest freq to be determined by 1st valid #V bucket we must default the attr ASYNC_NEST_FREQ_MHZ to 0xFFFF. This was changed as part of general axone simics bringup Change-Id: Ifdf4c5514e12eac1a290868d807710759ef98edc Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69574 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable PCIe slot bifurcation using HX keywordRichard J. Knight2018-12-072-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | -Update the PCIe config code to check the contents of the HX keyword attribute when determining the lane configuration. The HX keyword was defined to describe the lane configuration for a specific PCIe slot. It is generally stored in the VPD data of a PCIe card where it is read by the FSP. If the HX keyword data is populated, the FSP will then update the PEC_PCIE_HX_KEYWORD_DATA attribute for the PCIe slot the card is installed in. Once hostboot reads the HX keyword it will determine the correct lane configuration and adjust the IOP configuration attributes for the hardware procedure, p9_pcie_scominit, to consume. Change-Id: I10b1fcc84aacf3caf835e3cc9fffd1350cd30935 RTC:189286 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/59113 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Driver changes to support i2c muxRoland Veloz2018-12-063-5/+23
| | | | | | | | | | | | | | | | | | | | | | | | | - Updated data structures gpioAddr_t, eeprom_addr_t, misc_args_t, nvdimm_addr_t and tpm_info_t with I2C MUX data members. Also added constructors to these structures to default there data members with the correct default info. - Updated macros DEVICE_I2C_PARMS, DEVICE_I2C_ADDRESS and DEVICE_I2C_ADDRESS_OFFSET to take the I2C MUX bus selector parameter and the I2C MUX entity path. - Added method i2cAccessMux to file i2c.H/.C that will setup the call for the I2C MUX. Method i2cCommonOP calls i2cAccessMux which then calls i2cCommonOp with appropriate parameters for the I2C MUX: i2cCommonOP -> i2cAccessMux -> i2cCommonOP. - Updated i2ctest.H with new I2C MUX params to get it to pass. RTC:191352 Change-Id: I6a70860eb2286bbd23d6157d72351b8adfa21aac Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66651 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix predicateHwasChanged to only check subscribed bitsMatt Derksen2018-11-292-21/+186
| | | | | | | | | | | | | | | Found issue while running testGard11 in hwasGardTest.H OBUS bricks were coming back changed but they did not change. Change-Id: Icf2d27b06f8bf44dc2e0aefb881d9e2b50dcc677 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67476 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set FSIMASTER attributes to correct valuesChristian Geddes2018-11-271-3/+3
| | | | | | | | | | | | | | | | The hand-writen system xml for AXONE had incorrect values set for various attributes which describe FSI_MASTER/ALTFSI_MASTER a chip's master FSI device. Change-Id: I7df5e1155d4bd6c280383483a0bb1e46c75d04ce Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68816 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Define Parent/Child Relationship for OMIC/OMI targetsChristian Geddes2018-11-275-5/+158
| | | | | | | | | | | | | | | | | | | | | | | | This commit puts in the plumbing to have xmltohb.pl look for ATTR_OMIC_PARENT attributes on the OMI targets and with the value of that attribute define a bi-directional relationship between the given OMI target and its defined OMIC parent. Each target in the binary will have pointers to its associated parent/child. When getChildren<OMI> or getParent<OMIC> is called in the FAPI2 api for a OMIC or OMI target respectively, then the Hostboot platform implementation of these functions will route to the new getParentOmicTargetsByState and getChildOmiTargetsByState functions that were defined to perform lookups in the targeting binary for this relationship. Change-Id: I8cd901864a700c9fe575dfa0916d5e78760a7b0c RTC: 172969 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68541 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support for MRW attribute mss_mrw_nvdimm_plug_rulesDan Crowell2018-11-271-0/+8
| | | | | | | | | | | | | | ZZ support for enabling NVDIMMs Change-Id: Ibaf3292b092d975af13444fbd8ad2481e5e6efce Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68792 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: TSUNG K. YEUNG <tyeung@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* all scripts for hdat pnor partitionSampa Misra2018-11-272-6/+17
| | | | | | | | | | | Change-Id: Ied9c154d544d65eebfe5cfb0185ccb26545ee130 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67144 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Jayashankar Padath <jayashankar.padath@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Support a default risk/init level per MRWDean Sanner2018-11-263-5/+29
| | | | | | | | | | | | | | | | | | | | | -Previously default risk/init level was always 0 and required manual overriding to change. This commit allows for a default risk level to be specified in the MRW for a per system control without involving the BMC - Note that this is dependent on a change in the SBE to not always set the valid flags on the mbox scratch regs to actually control the default (today SBE always sets the valid bits). In the future the valid bit will only be set when someone manually overrides the scratch reg. Change-Id: Ia0e935a0d436f9dbb8233a8f1f181b4c7300d6d4 CQ: SW451891 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67344 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix CAPP target XML in Axone simics xml fileChristian Geddes2018-11-201-2/+2
| | | | | | | | | | | | | | | | | | There was some incorrect/missing information on the CAPP target in the newly hand created simics Axone xml. The FAPI_POS attribute for capp1 was set to 0, when it should be 1. Also the chiplet ID was incorrect for capp1. The chiplet ID for capp1 in all p9 systems should be 4. Change-Id: I42392b2f7afd1827cdad15e6308750a055f8a859 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68504 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add explorer directory to attribute_info lookupDan Crowell2018-11-191-0/+1
| | | | | | | | | | | Tell Hostboot to process the new attribute xml files for Explorer Change-Id: I0c584f916b928ce642cb93cd3138f13e1cb25ae6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68865 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Make ATTR_CLOCK_PLL_MUX writeable for DS8KDan Crowell2018-11-191-0/+6
| | | | | | | | | | | | | | HWSV needs to modify this attribute for the storage systems. Change-Id: I1c6a5db53e74ea2f3b164137706ff0a94bce122b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68797 Reviewed-by: Manish K. Chowdhary <manichow@in.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Route scom operations on OCMB chips to exp_i2c_scom interfaceChristian Geddes2018-11-154-1/+46
| | | | | | | | | | | | | | | | | | | | | | Before we get OMI targets trained we must use i2c to access scom registers on the OCMB chip. This commit does all of the plumbing so when HWP calls getScom() on a OCMB target, the hostboot platform recognizes this as a special scom and routes it to a new i2scom DD. This device driver will truncate the scom address to 32 bits and run the exp_i2c_putscom/exp_i2c_getscom interfaces to perform the operation. Eventually we need to also support MMIO scoms to the OCMB chip, the MMIO scoms will be used after the OMI training is complete. Change-Id: I0018cc8d25f74d1253b72c3112d3e344a4248416 RTC: 196806 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67976 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Pushing HB plugins and related files for building errltoolVenkatesh Sainath2018-11-151-4/+4
| | | | | | | | | | | | Change-Id: I91d432a901fb4ee6de469ca8076637eaa2e1315d Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/60027 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Sampa Misra <sampmisr@in.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update axone simics xml to use correct chiplet id for MC1 chipletChristian Geddes2018-11-151-3/+3
| | | | | | | | | | | | | | | | | There was an error in the hand-written simics xml for the Axone model. Instead of using CHIPLET_ID = 0x08 for MC1 chiplet and its sub-chiplets the XML had CHIPLET_ID = 0x07. This is incorrect and is fixed with this commit. Change-Id: I821aa175dd3b0beeb9124ffbc80dbbe045a35da0 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68487 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move HOMER BAR to Secure Memory in SMF ModeIlya Smirnov2018-11-131-108/+0
| | | | | | | | | | | | | | | | | This commits enables HOMER BAR to point to the top of the secure memory on SMF-enabled systems. Consequently, the HOMER image and hostboot reserved memory will be moved to the secure memory if SMF is enabled. Change-Id: I37c7527b06688a41e57f14b4107ff53a507ffae8 RTC: 198825 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66702 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Attribute support for recursive mutexesMatt Raybuck2018-11-126-44/+298
| | | | | | | | | | | | | | | | Added a new recursive mutex attribute, new test cases, and initializers for recursive mutex attributes. Change-Id: I49e6bc4fc2fd84e5c46e5d4c5ec125270347bde5 RTC: 196793 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/67939 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Deconfig parent rollup simplifiedMatt Derksen2018-11-093-4/+102
| | | | | | | | | | | | | | | Create a common deconfiguration rollup to parent. A new attribute was created to indicate when to stop rolling up the parent branch Change-Id: I80954081527f29bc466622d30644115a96be385f RTC:193268 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/66444 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add PCIe dynamic bifurcation function for barreleye G2Mengze Liao2018-11-014-15/+35
| | | | | | | | | | | | | | | | Adds support to query the BMC (via sensor) to determine the bifurcation settings of the PCI slots. Resolves #125 Change-Id: Ibb4333140c6209a4a04c5f1a8adf3bd278899a8b Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/52992 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: DHRUVARAJ SUBHASH CHANDRAN <dhruvaraj@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adds NVDIMM IPL Support on ZZTsung Yeung2018-10-301-9/+9
| | | | | | | | | | | | | | | -New NVDIMM functions to support restore and trigger setup -Includes NVDIMM step in call_mss_power_cleanup after mss_power_cleanup HWP -Fixes attribute NV_STATUS_FLAG to match HDAT spec Change-Id: I2d68123ceb0b8e7a33b54f9acad0968670a67ea9 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63948 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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