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* Add new path in EEPROM device op to allow reading from new EECACHEChristian Geddes2019-02-161-1/+3
* Set simics xml to match simics model for OCMB port numberingChristian Geddes2019-02-151-7/+7
* Add EEPROM caching device opChristian Geddes2019-02-131-34/+174
* Add call to p9a_ocmb_enable to istep 10.4Christian Geddes2019-02-111-0/+64
* Correct invalid HUID and chiplet id values for NPU targetsMatt Raybuck2019-02-081-2/+6
* Updates to processMrw.pl to fix erroneous chiplet idsMatt Raybuck2019-02-081-8/+176
* Fix deconfigure parent rollup policyMatt Derksen2019-01-313-46/+798
* Set the I2C MUX bus selector in the i2cPresence functionRoland Veloz2019-01-301-8/+8
* Do not gard cores on the initial core wakeup failureDan Crowell2019-01-292-0/+22
* Set TPM model to be the x75 nuvoton for axone simicsChristian Geddes2019-01-241-0/+4
* Inform PHYP of NVDIMM protection by OCCMatt Derksen2019-01-244-14/+78
* Add Support for Nuvoton 75x Model of TPMsMike Baiocchi2019-01-172-0/+20
* Set the DIMM SPD sizeRoland Veloz2019-01-162-1/+18
* Replace attribute I2C_MUX_INFO with attribute FAPI_I2C_CONTROL_INFORoland Veloz2019-01-155-106/+5
* Fix EEPROM_VPD_PRIMARY_INFO attribute on proc targ in axone sim XMLChristian Geddes2019-01-141-4/+8
* HTMGT: Clear OCC reset counts after an hourChris Cain2019-01-142-36/+36
* No parent rollup for OBUS childrenMatt Derksen2019-01-112-3/+13
* Add presence detection for i2c mux targetsChristian Geddes2019-01-112-0/+12
* Updates to processMrw to fix Chiplet IdsMatt Raybuck2019-01-091-1/+11
* Move NVDIMM Erase and Arm to RuntimeTsung Yeung2019-01-091-0/+45
* Real OCMB presence detection support for Axone simicsChristian Geddes2019-01-082-17/+358
* Deconfigure parent if no more functioning children of child's typeMatt Derksen2019-01-081-1/+5
* Add ATTR_REL_POS to NIMBUS system xmlMatt Derksen2019-01-051-1/+185
* HB Axone simics model changes to support DDIMM SPD i2c accessRoland Veloz2018-12-183-8/+232
* Fill in remaining dimms for simics_AXONE.system.xmlChristian Geddes2018-12-181-7/+247
* Add VPD_REC_NUM defaults for OCMB chips in Axone system xml for simChristian Geddes2018-12-171-0/+64
* Axone Simics Updates -- Finds Functional Master ProcBill Hoffa2018-12-141-6/+6
* Defect - multiple SRCs generated on zz systemMatt Raybuck2018-12-141-0/+4
* Hack to force OCMB presence detectionDan Crowell2018-12-131-63/+24
* Inband MMIO access to OCMBRick Ward2018-12-133-0/+106
* Default ASYNC_NEST_FREQ_MHZ to be 0xFFFF for Axone simics xmlChristian Geddes2018-12-101-0/+4
* Enable PCIe slot bifurcation using HX keywordRichard J. Knight2018-12-072-2/+11
* Driver changes to support i2c muxRoland Veloz2018-12-063-5/+23
* Fix predicateHwasChanged to only check subscribed bitsMatt Derksen2018-11-292-21/+186
* Set FSIMASTER attributes to correct valuesChristian Geddes2018-11-271-3/+3
* Define Parent/Child Relationship for OMIC/OMI targetsChristian Geddes2018-11-275-5/+158
* Support for MRW attribute mss_mrw_nvdimm_plug_rulesDan Crowell2018-11-271-0/+8
* all scripts for hdat pnor partitionSampa Misra2018-11-272-6/+17
* Support a default risk/init level per MRWDean Sanner2018-11-263-5/+29
* Fix CAPP target XML in Axone simics xml fileChristian Geddes2018-11-201-2/+2
* Add explorer directory to attribute_info lookupDan Crowell2018-11-191-0/+1
* Make ATTR_CLOCK_PLL_MUX writeable for DS8KDan Crowell2018-11-191-0/+6
* Route scom operations on OCMB chips to exp_i2c_scom interfaceChristian Geddes2018-11-154-1/+46
* Pushing HB plugins and related files for building errltoolVenkatesh Sainath2018-11-151-4/+4
* Update axone simics xml to use correct chiplet id for MC1 chipletChristian Geddes2018-11-151-3/+3
* Move HOMER BAR to Secure Memory in SMF ModeIlya Smirnov2018-11-131-108/+0
* Attribute support for recursive mutexesMatt Raybuck2018-11-126-44/+298
* Deconfig parent rollup simplifiedMatt Derksen2018-11-093-4/+102
* Add PCIe dynamic bifurcation function for barreleye G2Mengze Liao2018-11-014-15/+35
* Adds NVDIMM IPL Support on ZZTsung Yeung2018-10-301-9/+9
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