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* pnor: Introduce an IPMI-based PNOR driver implementationAndrew Jeffery2018-10-101-2/+8
| | | | | | | | | | | | | | | | | | Similar to the AST MBOX implementation, the IPMI PNOR implementation negotiates the layout of the LPC FW space with the BMC, but using IPMI rather than the AST mailbox as a protocol transport. The same protocol is still used and has simply been adapted to the new interface. Note that currently the change of transport has had a 2-3x impact on boot performance. Optimisation is an ongoing effort. Change-Id: I7f838f5b5e88ac877a725386a33df58ee5e7213c Signed-off-by: Andrew Jeffery <andrewrj@au1.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65942 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* pnor: Add AST Mailbox protocol supportBenjamin Herrenschmidt2017-05-011-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new alternative PnorDD that uses the Asped AST Mbox protocol as supported by OpenBMC. To enable this, you need these changes to the config: @@ -1,10 +1,12 @@ -# The Serial Flash Controller is the AST2400 BMC. -set SFC_IS_AST2500 +# We use BMC MBOX protocol for flash accesses +set PNORDD_IS_BMCMBOX +unset PNORDD_IS_SFC +unset SFC_IS_AST2500 unset SFC_IS_AST2400 unset BMC_DOES_SFC_INIT unset SFC_IS_IBM_DPSS -set ALLOW_MICRON_PNOR -set ALLOW_MACRONIX_PNOR +unset ALLOW_MICRON_PNOR +unset ALLOW_MACRONIX_PNOR Other systems need to set PNORDD_IS_SFC Change-Id: I8901288c98d8d0fce8c9a0fb31267f0001b2a731 Not-yet-signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> RTC: 170096 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39387 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Change AST2400 to default only if AST2500 isn't setMatt Ploetz2017-02-071-1/+1
| | | | | | | | | | Change-Id: Ic9c1da281fcdc650e7528a84377d4fbe51355c84 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32292 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Pnor DD Changes for AST2500Bill Hoffa2016-10-311-3/+9
| | | | | | | | | | | | | | | | - Created Common sfc_ast2X000 class for common functions - Modified sfc_ast2400 class to use common class - Added sfc_ast2500 class Change-Id: I27c7674b58e006801ae03aabd60fdcfa21f49e9c RTC: 161664 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30919 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* PNOR driver changes for 128MB supportcrgeddes2016-07-221-2/+15
| | | | | | | | | | | | Minimum set of changes to support a 128MB PNOR chip RTC: 154286 Change-Id: I0e4a5cf5aa06bfe6e8aef65be4ccc180d15a2d01 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27143 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* pnor: fix support for SP/BMC-less SFC initRobert Lippert2016-06-141-0/+6
| | | | | | | | | | | also fixes up mismatched IDs for macronix flash parts Change-Id: I81b89e9a7239669e769864711797830b44351bfd Signed-off-by: Robert Lippert <rlippert@google.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25731 Tested-by: Jenkins Server Tested-by: FSP CI Jenkins Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Establish a working P9 Hostboot and Simics baseDean Sanner2015-12-111-3/+3
| | | | | | | | | | | | | | | Includes changes for nimbus.por Making recent Simics usable by Hostboot Removing portions of code not yet ready Basic LPC read/write Change-Id: Ic40a9613934fab7bb6a28a8100685496246bb5ea RTC:132170 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21931 Tested-by: Jenkins Server Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com> Reviewed-by: Christian Geddes <crgeddes@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Ensure double-side support is not enabled on 32MB chips.Patrick Williams2015-03-031-0/+1
| | | | | | | | | Change-Id: I92c7bbf13bf1d672f805e8a765484be22f13930a Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/16080 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: PRACHI GUPTA <pragupta@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* determine the toc locations in pnorrp and rt_pnor codePrachi Gupta2015-02-241-1/+1
| | | | | | | | | | RTC: 120733 Change-Id: I5372a102ce9761a514a6f7245ca206a2226f1f3b Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15456 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Support for Redundant Copy of HB code in PNORStephen Cprek2015-02-021-0/+5
| | | | | | | | | | | | | - 2 TOC's per side - side, sideless, preserved, and readOnly tags - Determine which SEEPROM side HB booted from - Modify gaurd code to not run when gaurd section DNE Change-Id: I62dd27c9aa79c3111d27e647f1b66a7c938ad6e8 RTC:109398 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14629 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Update PNOR build script to handle two sidesDean Sanner2014-10-211-0/+4
| | | | | | | | | | Change-Id: I61db4d83ba8ea7ddc61c776625b43a07ee0039b0 RTC: 115870 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13479 Tested-by: Jenkins Server Reviewed-by: STEPHEN M. CPREK <smcprek@us.ibm.com> Reviewed-by: WILLIAM G. HOFFA <wghoffa@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Split out SFC logic and add support for AST2400Dan Crowell2014-10-141-4/+18
| | | | | | | | | | | | | | | | Refactored the PNOR device driver to pull all SFC-specific code into a new set of classes. Any time a new type of serial flash controller (SFC) is introduced, a new subclass should be created to support it. Also added the full support for the AST2400 BMC that is being used on Palmetto. Change-Id: I9cdbf9b48bbf94615a39804920e170a3142ec386 Origin: Google Shared Technology RTC: 97493 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/13229 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Enable Test to Validate Alt Master's LPC connection to PNORMike Baiocchi2014-09-081-1/+2
| | | | | | | | | | | | | | | | This commit adds a new test during istep 9.2 where all possible Alternative Master's will have their LPC connection to PNOR tested. The test will be done by creating a unique PnorDD class and reading out the PNOR's TOC. This commit also updates the PnorDD class to use a non-MASTER_PROCESSOR_CHIP_TARGET_SENTINEL target. Change-Id: I7c141b0527a6f4d0ec5a702e9961ce686dd66a48 Backport: release-fips820 RTC: 87871 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11348 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
* Add PNOR support for AST2400 BMCDan Crowell2014-06-301-0/+20
Changes from Palmetto board bringup to enable PNOR reads. Change-Id: I13ad550eb7103a27af9ee4cb774dd504cae240a7 RTC: 106881 Origin: Google Shared Technology Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11544 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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