summaryrefslogtreecommitdiffstats
path: root/src/usr/i2c
Commit message (Collapse)AuthorAgeFilesLines
* Move definition of TRACE_ERR_FMT and TRACE_ERR_ARGSMike Baiocchi2020-02-031-2/+1
| | | | | | | | | | | | | | | | | Originally TRACE_ERR_FMT and TRACE_ERR_ARGS were defined in centaurScomCache.H for the P9 'master' branch. This commit puts them into the more proper errlentry.H file like they are for P10's 'master-p10' branch. Change-Id: Icb7af6ae721a15036804b7d35f49911888eb5eaf Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/90705 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
* Make RT_TARG id generation code common between IPL time and runtimeChristian Geddes2020-01-222-5/+5
| | | | | | | | | | | | | | | | | For axone we are writing the OMI mmio bars into hdat so the hypervisor know how to talk to the devices. IPL code needs to be able to lookup the hbrt-style ids so we can use them to make hdat entries that the hypervisor will be able to associate targets with. This commit also move rt_targeting.H to the correct include directory and updates everywhere that it is included. Change-Id: I31deaa1a9c5a7523622a8b3b12ad459e2b2feed3 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80419 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* NVDIMM: Use block write for nvdimm updateMatt Derksen2020-01-201-14/+41
| | | | | | | | | | | | | | | | | | | | In an effort to speed up the nvdimm update, full 32-byte blocks can now be sent via I2C SMBUS with no initial byte count byte. Since a block write seems more prone to random system interrupt, this code should be restricted to run on v3.A or beyond which has the timeout increased to mitigate these interrupts. Test results have shown about a 5 minute improvement per NVDIMM. Change-Id: I040a5f2cc5afb76a73129ef9f6ac965cf36775f4 CQ: SW471053 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79678 Reviewed-by: Corey V Swenson <cswenson@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: TSUNG K YEUNG <tyeung@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Automatically include config.hDan Crowell2019-12-062-2/+0
| | | | | | | | | | | | | | | | | | Rather than having to remember to include config.h anywhere we reference a CONFIG variable (and usually forgetting), this adds it to the default compiler flags so that it gets included in every source file we build. Change-Id: I53622ab4d46c55d942e98cae6ec03049fd5b3d08 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/87475 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Zachary Clark <zach@ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: Nicholas E Bofferding <bofferdn@us.ibm.com>
* Fixes to PMIC presence detectionChristian Geddes2019-11-071-15/+22
| | | | | | | | | | | | | | | | | | | | | While performing presence detection on the PMIC targets we need to first read the parent OCMB's SPD to see what device address the PMIC is on. There was a bug where we were attempting to read the parent OCMB's spd without first checking if the OCMB is present itself. This commit adds a check to ensure we dont attempt i2c reads on devices that are not present. Also this commit adds a check to make sure we do not attempt presence detection on GEMINI ocmbs Change-Id: I999189b3b97210bb37b7ba1fdb2d86658d770e36 CQ: SW480414 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/86564 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Avoid commiting errors inside fapi2_i2c device driverChristian Geddes2019-11-071-13/+34
| | | | | | | | | | | | | | | | | | | | | | | | There are instances where we expect NACK errors returned from i2c requests, for example when waiting for the ocmbs to declare themselves "ready". In these cases we do not want to flood the error log with expected I2C nack errors. To avoid this, instead of committing retriable errors inside of the fapi2_i2c device driver when the MAX RETRY ATTEMPTS is reached we will instead just add traces to the err that gets returned to the caller that explain previous retryable errs occured. In the case where we hit retryable errors and eventually hit and non-retryable error the retryable error is committed in the driver and the non-retryable error is returned to the caller. Also this commit adds some timings to the error log so we can tell how long our attempts took. Change-Id: I9a5ee0bfe088444aa7fecd974f61514c40b320a6 CQ: SW480155 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/86419 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Allow dynmic i2c device addresses and set up PMIC targets to do thisChristian Geddes2019-11-013-11/+128
| | | | | | | | | | | | | | | | | | | | | | Depending on which vendor made a given OCMB the i2c device address of the PMIC targets on the OCMB will be different. To account for this we have added a new DYNAMIC_DEVICE_ADDRESS attribute. This attribute is filled out on the PMIC target by looking at the SPD on parent OCMB chip. This means that we must do presence detection on the OCMB prior to the the PMIC targets. While doing i2c operations if a given target has the DYNAMIC_DEVICE_ADDRESS we will use that over the devAddr in the any complex i2c attribute for that target. Change-Id: I22a185a65c064a1514751dd5828547c57af98df1 RTC: 209714 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/85394 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: William G Hoffa <wghoffa@us.ibm.com>
* Fix calling eepromddtest.HMatt Derksen2019-08-161-1/+1
| | | | | | | | | | | | | Makefile change overwrote TESTS and lost adding of eepromddtest.H Change-Id: I01adcc3958ce181909589b159a86a54bceb65257 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/82293 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com>
* OR mux select with the "enable" bit 0b1000 when making selectionChristian Geddes2019-08-011-2/+13
| | | | | | | | | | | | | | | | | | | During simics bringup we figured out that the mux selects needed to be between 8-15. We learned during bringup this is because the real 0-7 select needs to be OR'ed with the enable bit for the model of mux. This commit does the ORing correctly and subtracts 8 from all of the muxSelects used in the simics xml so we match what the MRW is doing. Change-Id: I45faab455afdfc63ac05fc2637890f9d0137a444 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81397 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Always update EECACHE header when we find a new eeprom entryChristian Geddes2019-08-011-6/+11
| | | | | | | | | | | | | | | | | | The plan of this caching algorithm is to make a cache entry for every OCMB/DIMM, Proc, and Node eeprom that we detect in the XML. We will only copy the contents of the EEPROM if the target is found to be present, but we still must make header entries in for targets that are not present. Change-Id: I46328b84f7095eec9df7abb2f40b0d11ed0c4324 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81192 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Register EEPROM_CACHE device route for NODE targets for PVPD supportChristian Geddes2019-07-231-0/+5
| | | | | | | | | | | | | | | | | | Previously when adding PVPD support for Axone we we forgot to register the NODE targets for the EEPROM_CACHE device route. This was causing the PVPD eeprom to not be cached. This commit registers the device route and fixes the issue. Change-Id: Ib530c552eb5c2fed1757f536a400752369de161f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/80559 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Support reading from EECACHE during runtimeChristian Geddes2019-07-178-461/+910
| | | | | | | | | | | | | | | | | | | | | To support VPD accesses at runtime we had to add support to access the information in the EECACHE section of pnor during runtime. To do this we copy the contents of the EECACHE section into reserved memory during the runtime setup steps of hostboot. Then when HBRT is loaded we will process that EECACHE section and built up a map that will allow read/write accesses to the eecache section just like during the IPL. Change-Id: I2d08c883e6c09c3194d85abe141c35bb2b76b126 RTC: 204341 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79985 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Add Support for new HDAT Slave Device Type for Nuvoton 75xMike Baiocchi2019-06-281-4/+5
| | | | | | | | | | | | | | | | | The new HDAT spec added a new 'TCG_i2c_TPM' Slave Device Type for the Host I2C Device Entry Structure. This commit adds the use of it for Nuvoton 75x support. Change-Id: I01f75c919f255786e5b32dcde9b86b2e15d33986 RTC:204133 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79527 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add Device Tree support for Nuvoton TPM 75xMike Baiocchi2019-06-271-1/+24
| | | | | | | | | | | | | | | | This commit updates the code that creates the device tree to support Nuvoton TPM 75x models along with the existing 65x models. Change-Id: I46b08970911d259f620c747015800e4aeba34b99 RTC:204133 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78743 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add HCDB Support for eeprom cache processChristian Geddes2019-06-262-65/+182
| | | | | | | | | | | | | | | | | | While parsing the EEPROMs of the system as part of the EECACHE process if we detect a part has been replaced, removed, or added then we must call markTargetChanged to notify hwas to take appropriate actions. This commit also introduces the new preloaded EECACHE section for simics. Change-Id: I9f2a8a62d5c6f9a6c66a0c0c7ed5ed86f7d94aec RTC: 211109 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78762 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add interface to mark eeprom caches valid/invalidChristian Geddes2019-06-245-31/+448
| | | | | | | | | | | | | | | | | | | | There are certain scenarios where we might want to update the table of contents at the start of the EECACHE section in pnor to indicate we have decided that the cached copy of one of the eeproms is no longer valid. This commit adds the ability to mark a cache entry as either valid or invalid by calling setIsValidCacheEntry in the EEPROM namespace and tests to verify this works. Future commits will add this call to places it is needed. Change-Id: I6b7dc807b7dbcaca3efa298790f862bc2c5f9ec6 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78494 Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Modify I2C divider for AxoneDan Crowell2019-06-212-7/+23
| | | | | | | | | | | | | | | | Axone modified the internal divider that is used to calculate the i2c bus speed from 4 to 2. Change-Id: Ic2be08cfe97f3ea20f94e97d11ecaeb3ba679660 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79152 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable tpmddtest.H for AxoneMatt Derksen2019-06-191-12/+24
| | | | | | | | | | | | | | | Simics now supports VENDORID_75x. Change-Id: Ic74f6d26ef791b0807c9c6441536348dac062294 RTC:201738 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/79060 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Use i2c word write for NVDIMM updateMatt Derksen2019-06-121-4/+12
| | | | | | | | | | | | | | Trying to reduce the update time and this reduced teh time to about 12.3 minutes. Change-Id: I97cd29a8bcda58902089480f2cc0849381e7d2cf CQ:SW466226 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78422 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Clean up some comments and refactor how we determine new cache entryChristian Geddes2019-06-051-19/+14
| | | | | | | | | | | | | | | | | | | While code was added to handle detecting new OCMB parts a new check was added to make sure an entry was newly added to cache to make it so we didnt do new part validation on entries that had not been cached yet. This commit removes what was added and leverages existing information we had earlier on in the caching algorith. Also in this commit a few minor comments were addressed related to tracing and doxygen comments. Change-Id: Ie3454181449320a6a570c15692cc1f71c819ba22 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77814 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Chen Du <duchen@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Integrate pmic_enable HWP into IPLMatt Derksen2019-05-311-5/+10
| | | | | | | | | | | | | | | Add pmic_enable to istep 8.12 host_set_voltages. Change-Id: I67079281fd72c2c651db069479882dd7c9e4587c RTC:209259 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77402 Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add cache/hardware comparison functions for SPD classes of VPD contentMatthew Raybuck2019-05-311-40/+119
| | | | | | | | | | | | | | | | This commit adds necessary support for ensuring the eeprom cache is in sync with hardware for EEPROM_CONTENT_TYPE DDIMM and ISDIMM. Support for IBM_MVPD and IBM_FRUVPD will be added in a later commmit. Change-Id:I0392c3f6b5dae986c03b9a16cef99a1529dade31 RTC:203788 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77119 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Clean up traces seen during Axone IPLsChristian Geddes2019-05-294-13/+13
| | | | | | | | | | | | | | | | | | This commit is an audit of the traces that have been added in Axone. This commit should remove ~32,000 lines of traces from hbTracMERG which were result from a few poorly placed trace statements. Also in this commit a few xml attribute are fixed which were causing errant traces. Change-Id: I6ddcfa449aa94e1c661dcf08ec1482be1d5b4b14 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77754 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Gemini vs Explorer Presence Detection via SPDMatthew Raybuck2019-05-011-5/+0
| | | | | | | | | | | | | | | | | | | | | | | Since the OCMB chip is held in reset until after presence detection the IDEC register cannot be read to differentiate between Gemini and Explorer chip types. To work around this issue, during the early part of IPL when presence detection is occurring the OCMB IDEC function will instead read the SPD and populate the necessary attributes with what is found there. That will be used to determine the difference between Gemini and Explorer until later when the OCMB IDEC register can be read from. At that point the IDEC read will be executed again and the data read from the OCMB IDEC register will be used to cross-check the data read from the SPD. Any discrepancies will be handled with predictive error logs. Change-Id: Ica664b06ff3488f48253d3ef02eff2d49c5d240d RTC: 208696 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76108 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix missing header file in eepromCache.CMike Baiocchi2019-04-191-1/+5
| | | | | | | | | | | | | | | | There was a use of a CONSOLE function in eepromCache.C but the necessary header file console/consoleif.H was not included. Change-Id: Iae02a9fd6c1f6bcc45a1e287a6466bb626b2c079 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76176 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add new PMIC target for AxoneMatt Derksen2019-04-182-50/+79
| | | | | | | | | | | | | | | | PMIC is a voltage regulator for the DDIMM. It supplies power to the OCMB and DIMM targets. Change-Id: I10c1b03169f53b070f521ec9cd60cdbd15c4a268 RTC:206184 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75136 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Infer presense detection of Explorer chip from VPD EEPROMMatthew Raybuck2019-04-181-53/+11
| | | | | | | | | | | | | | | | | | | | During presense detection the explorer chip is being held in reset. In this state it will not respond to any I2C operations and therefore we cannot physically detect the chip during normal presense detection. Instead we infer its presense based on the presense of the associated VPD EEPROM. Change-Id: Id07eb77fc9c3eab09e852b191ad4a32832880c38 RTC:203722 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75891 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fix UCD invalid command error for 0 byte block read SMBus requestsNick Bofferding2019-04-171-20/+30
| | | | | | | | | | | | | | | | | | | | | | If a UCD device had a legitimate 0-sized reponse to a block read request, this set off a bug in the code where the i2c driver would issue a 0 byte read request without a start, stop, or address bit, which causes the i2c engine to throw a command invalid error. This commit fixes the logic so that in that condition, the driver either skips the offending read (for cases where a PEC byte follows), or completes the transaction with a stop bit (for no PEC byte case) Change-Id: I64011b4e540120c8547fa3ca84a4dd68f45b479a CQ: SW462736 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75940 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Make sure memory is cleaned up in errlud_i2c.CMatt Derksen2019-04-151-8/+9
| | | | | | | | | | | | | | | | This small update is based on review comments to a previous fix of runtime i2c crashing issue. Previous Change: I6c912e71b22da80b166e13dc66bdf0e5a51abfbb Change-Id: If9c33773777943a67f9a5e00d48f0647b45c8406 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75235 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Cleanup UCD Update Algorithm CodeMike Baiocchi2019-04-031-1/+1
| | | | | | | | | | | | | | | | | This commit converts previous asserts to valid error log calls while also updating some traces to the UCD update algorithm procedure. Change-Id: I4579d1eb602bbcb35ef9fd01131178d24007727a RTC:205979 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75323 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Handle bad PEC from UCD device opMatthew Raybuck2019-03-291-4/+68
| | | | | | | | | | | | | | | | The current UCD code doesn't have any error handling for a bad PEC byte instead it is just ignored. This will add the necessary error handling to the retry code for bad PEC bytes. Change-Id: I8d9960a203b5864812bcaa0019087bb3dcff0c53 RTC:205982 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/75174 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Invoke UCD Update Algorithm on UCD DevicesMike Baiocchi2019-03-261-5/+3
| | | | | | | | | | | | | | | | | | | This commit invokes the full UCD update algorithm on all UCD9090 and UCD90120A devices found in ZZ and Zeppelin systems. The algorithm is based on walking through a pre-processed update binary per UCD device and calling the appropriate SMBUS device operations. Change-Id: I626df3612260d505e65a22d0620b65216d00c65f RTC:205979 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74887 Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com>
* Add minor tweaks to I2C Callouts for UCDMatthew Raybuck2019-03-221-2/+5
| | | | | | | | | | | | | | | Adds some comments and collects traces for Ucd Errors. Change-Id: I431684a2ff2f5466bd6f9f917e902ffc45809d7d RTC:205982 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74854 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Glenn Miles <milesg@ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set MUX i2c slave port to be 1Christian Geddes2019-03-221-0/+3
| | | | | | | | | | | | | The i2c controller info attribute for the I2C Mux target had the port information set incorrectly. This commit addresses that and adds a debug trace that was helpful in figuring out this issue Change-Id: I34b5c920e8fe4f0f0ea68ce5aaf268095aab9886 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/74864 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Support UCD for I2C calloutsMatthew Raybuck2019-03-211-10/+52
| | | | | | | | | | | | | | | Adds in the necessary code to have UCDs in the current I2C callout API Change-Id: I505373da5b53c194270bf414f546877f6baee390 RTC:205982 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73360 Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Adjust I2C Reset for OpenPower MPIPLMike Baiocchi2019-03-182-3/+99
| | | | | | | | | | | | | | | | | A new internal I2C function was created to read the Security Switch Registers "Seeprom Update Lock" ("SUL") bit and reduce the I2C reset level if set to avoid Arbitration Lost errors during an OpenPower MPIPL. Change-Id: I1709b425182be92377a988cd64d5683733236b05 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73405 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Fixing runtime i2c operationMatt Derksen2019-03-152-13/+37
| | | | | | | | | | | | | | | | | Base i2c operations were updated with new parameter for UCD work, but runtime i2c was not updated. Also fixing orphaning error log memory and potentially calling toString on a nullptr. Change-Id: I6c912e71b22da80b166e13dc66bdf0e5a51abfbb CQ:SW459731 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/73361 Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* UCD Flash Update: Support I2C SMBUS operations for UCD flash updateNick Bofferding2019-03-083-27/+1028
| | | | | | | | | | | | | | | | | - Adds I2C SMBUS operations for UCD flash update - Creates UCD component ID + trace name - Creates stub for UCD flash update entry point Change-Id: Id75cdd137b5a4924998c04bdbdce9218610a4906 RTC: 201992 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72229 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matthew Raybuck <matthew.raybuck@ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Updates to testcases for AxoneDan Crowell2019-03-071-0/+5
| | | | | | | | | | | | | | | | | | Disabling a few testcases temporarily until Axone gets off the ground. Cleaned up some bad traces, etc in existing code. Add CI support for AXONE config Change-Id: I7a2140366e225971c91a50cec1f7e822e4847078 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72186 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Secureboot: Enhance Error Callouts For New Multinode Trustedboot TransferMike Baiocchi2019-03-051-3/+11
| | | | | | | | | | | | | | | | | This commit adds many checks to callout potential issues with the new multinode trustedboot transfer protocol. It also improves some TPM-related traces. Change-Id: Ice3f8be0668cc63321eeb2562bb8ffe610284b6a RTC:203642 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72363 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Allow for nullptr io_buffer in eecache readChristian Geddes2019-03-043-10/+36
| | | | | | | | | | | | | | | | If the user passes a nullptr as the io_buffer it is assumed that they want the size of the eeprom they are looking up. So just return the size in io_buflen. This commit also adds useful debug traces to the eepromdd.C file. Change-Id: Ia38c5045e2a8fde331b4801e2e356be5ac6dee22 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/72166 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add new path in EEPROM device op to allow reading from new EECACHEChristian Geddes2019-02-1611-2433/+2934
| | | | | | | | | | | | | | | | | | | | | | | | | | Recently a new EECACHE section was introduced to Hostboot. This section gets populated with a copy of every PRIMARY_VPD eeprom (someday could contain other eeprom roles also) during host_discover_targets. This commit add support to allow users to select where they want to perform their EEPROM device operation. If they pass CACHE to the deviceOp macro then a read will come from the pnor cache, writes will write to pnor cache and then also write to the eeprom HW. If HARDWARE is passed in then reads and writes will be directly done on the eeprom hardware. If AUTOSELECT is passed the code will check our cache to see if we have a copy of the eeprom in question, if we have a copy we will go the CACHE path, if no copy exists we will go the HARDWARE path. Along with this change some reorganization was done w/ the eeprom related files. RTC: 196805 Change-Id: If2c4e5d3e338a1a10780740c1a019eb4af003b73 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70822 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add EEPROM caching device opChristian Geddes2019-02-136-113/+682
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces a new EEPROM_CACHE deviceOp and registers the OCMB_CHIP, PROC, and DIMM targets to it. This is part of the larger effort to transition for a "VPD" cache to an "EEPROM" cache in pnor. The deviceOp is currently called in hwasPlat's platPresenceDetect if the target in question has a ATTR_EEPROM_VPD_PRIMARY_INFO associated with it. The layout for the new EECACHE section in pnor is defined in eepromCache_const.H. Essentially it is a header that contains an array of record headers that tell where in the EECACHE pnor section a given cached EEPROM can be found. All EEPROM targets will be allocated space in the EECACHE section but only present targets will have their cache filled in. RTC: 196805 Change-Id: I49c341c9784be04ddf0259bd444f06c9baf8c6f1 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70520 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Set the I2C MUX bus selector in the i2cPresence functionRoland Veloz2019-01-304-91/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | - Expanded the i2cPresence API to take in the I2C MUX bus selector and the I2C MUX path. This will facilitate setting the bus selector within the i2cPresence function. - Set the I2C MUX bus selector in the i2cPresence function via the call to i2cAccessMux. - Simplified the i2cAccessMux API. It only takes in what it really uses. - Added several dump utility functions that are strictly there to dump certain data structures on an as needed basis. Was useful to have these utilities to see certain data structures but does not slow down the run time because the user must explicitly call them. - The structures that can get dumped are TARGETING::EepromVpdPrimaryInfo, eeprom_addr_t, TARGETING::FapiI2cControlInfo and I2C::misc_args_t. Change-Id: I14943687a934bfb21bc5cf3db0540b7e629a6257 RTC:203596 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71011 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
* Move NVDIMM operations under NVDIMM modulesMatt Derksen2019-01-219-1998/+11
| | | | | | | | | | | | | | | Makes it easier to find and include NVDIMM operations. Also makes it easier to exclude from non-nvdimm supported systems. Change-Id: I870c2246e1bb9201e6e8032f1868e6e4e6a2b91a Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70489 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secureboot: Add New TPM Commands For NodecommIlya Smirnov2019-01-181-2/+3
| | | | | | | | | | | | | | | | | | This commit adds four new TPM commands, and APIs thereto, for enhanced secure multinode communication protocol. The TPM commands are the base for the new protocol and will be used as part of it. Change-Id: I080ff87cd6001b5d2e13ae350a379cbc2c92bfcf RTC: 202364 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69725 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add Support for Nuvoton 75x Model of TPMsMike Baiocchi2019-01-173-124/+321
| | | | | | | | | | | | | | | | | | This commit adds the ability for hostboot code to support the Nuvoton 75x TPMs along with the current support of the 65x models. A new attribute TPM_MODEL is used to configure the appropriate settings for each model. Change-Id: I14b0f6606a1a94d0ed300fd51bbf3f50e63dfb01 RTC:202356 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70464 Reviewed-by: Ilya Smirnov <ismirno@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Replace attribute I2C_MUX_INFO with attribute FAPI_I2C_CONTROL_INFORoland Veloz2019-01-151-3/+3
| | | | | | | | | | | | | | | -- Just removed all instances of I2C_MUX_INFO and replaced with FAPI_I2C_CONTROL_INFO if not already there. Change-Id: Ie161abb25ef75b632d6c429fb247ccbd04eb2135 RTC: 203024 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70022 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Add presence detection for i2c mux targetsChristian Geddes2019-01-115-159/+339
| | | | | | | | | | | | | | | | | | | | | | | This commit removes the ddimm.C file that had the deviceFramework routing for OCMB presence detection and replaces it with a new file in src/usr/i2c/i2cTargetPres.C that is more generic for any target that has the FAPI_I2C_CONTROLLER_INFO attribute. The i2c_mux target also now uses this same code for its presence detection. As a result of this change the src/usr/i2c/mux_i2c.* files have also been removed. When getting rid of the ddimm.C file I had to put the IDEC device routing somewhere else so I moved it to the hwasPlat code where the other IDEC device routes are registered. RTC: 196805 Change-Id: I27e5e3e8d0fe107c3d44a450e20efa6f50fa0c5f Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69944 Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move NVDIMM Erase and Arm to RuntimeTsung Yeung2019-01-092-51/+8
| | | | | | | | | | | -Move erase and arm to after OCC has started -Address several TODOs in I2d68123ceb0b8e7a33b54f9acad0968670a67ea9 -Combine arm and erase into an atomic operation with ATOMIC_SAVE_AND_ERASE Change-Id: Iad06f6fe7128df3defc4ded57b0151f9c4b9d15e Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68197 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
OpenPOWER on IntegriCloud