| Commit message (Collapse) | Author | Age | Files | Lines |
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Change-Id: I3ad1335d734ec04e7cc68833662bf228302b838f
RTC:178802
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/54037
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I24092ef382fc56b7d3e0aa90a2699ff6cf42d8e7
RTC:180894
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/48703
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ibc62f59635db28e50197139276b9b4c6b59ccc3e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/44768
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This commit re-enables the test modules that were shut off for the
initial start of of the p9 simics model. Most of the changes were
updating hardcoded values and changing the definition of a "fail"
for some of the test that were assuming certain components to be
contained in the system
Change-Id: I1860f49ea83ba1946f5181a05a4e97f10f1522f3
RTC: 129630
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/22826
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Added new external interfaces to retrieve information
about the FSI topology and the PNOR characteristics
in order to enable the checkstop analysis code that
runs on the OCC.
RTC: 108820
Change-Id: Ibbe9bca8eee4c8ac86006b1ad881bd8b2c3b8280
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/15726
Tested-by: Jenkins Server
Reviewed-by: Zane Shelley <zshelle@us.ibm.com>
Reviewed-by: William H. Schwartz <whs@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I5664587b4f889099290ef50d50fa9ce5e580e1eb
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11167
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I6d285e9ca357ebbf0c1b0f7118da0f5b727113d3
RTC: 84070
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/7947
Tested-by: Jenkins Server
Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com>
Reviewed-by: Michael Baiocchi <baiocchi@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I1538fbf386d5480e473f3f0b049492d494412624
RTC: 35064
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/5825
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Modified FSI path for proc1 due to Simics model changes
Fix FSI testcase that was using outdated version reg
Enhance standalone script to start SBE on all procs
Change-Id: I2758912914b778a2c430124678546175e6223e30
RTC: 51465
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/4357
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I6ea44b24b27a833534e378fa552e1930a73759f5
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/3395
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Inside the start payload istep a set of FAPI attributes will
be read and copied into a specified location of mainstore so
that HostServices runtime code can access them.
There are 4 files that will be shared with HostServices code:
- attribute_structs.H : common structures used to define data
- hsvc_sysdata.C : list of required system attributes
- hsvc_procdata.C : list of required proc attributes
- hsvc_exdata.C : list of required ex attributes
RTC: 41242
Change-Id: I3af3b2bf99b4dbedb6efeb2cb35e49ba066a9c19
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1893
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Simics is going to start reporting the real chipid value for
Murano. There were a few testcases that had the chipid
hardcoded. Rather than trying to account for the differences
I just removed the tests as other tests should be sufficient.
Change-Id: I2b52d9883311ed6a1e1cb8a688b3583892119de5
RTC: 45071
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/1367
Tested-by: Jenkins Server
Reviewed-by: CAMVAN T. NGUYEN <ctnguyen@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Update testcases for scom, i2c, mvpd, fsi
Change-Id: I357c4efb046c04da1c801ec257a1827e36a73e25
RTC: 39765
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/943
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Added enums for the status control register
Added comments in the dd code
Removed the check on a read if input buf is larger than the max
amount of data read.
Made changes to read/write not on a 32bit boundary
Remove Mboxdd class and used mbox namespace
RTC: 38020
Change-Id: Ia2842a380ed90d370dd1503aa0b189813229c7a4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/886
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Moving up levels to get to a stable fips810 driver that
includes some Simics fixes
RTC: 40995
Change-Id: Iedbefc0f765b51d18af5a106fb4db89a9531f739
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/946
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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- Moved common targeting code to own subtrees
- Updated many components with header file changes
- Implemented abstract pointer class
- Implemented Hostboot specific support for targeting commonality
- Changed attribute VMM base address to 4 GB (From 3 GB)
- Removed tabs, fixed > 80 character lines
Change-Id: Ie5a6956670bfa4f262f7691b4f0ce5a20ed289fe
RTC: 35569
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/909
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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This is work for Task 38048
-Updated bbuild to an 810 build with the latest Simics support
-Pulled support for Salerno from build tools
-Changed DEFAULT_MACHINE to MURANO
-Updated testcases to follow error logging guidelines
-Fixed up some FSI error handling bugs
-Disabled FSI loopback on VENICE (fix with Task 39187)
-Disabled a few testcases (see Impediment 39188)
Verified both MURANO and VENICE configurations
Change-Id: Ie7761f49c9e653489c8c4dad261b1c8852fa7548
RTC: 35596
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/791
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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-Updated bbuild to c0131a_1205.760 (released 1205.760 driver)
-Removed writes to MCRSP32 regs from testcase (see Issue 35803)
-Removed access to made-up reg 0x12345 from scom test
-Removed Simics workaround for reg 0x02011403 in scom test
-Updated debug FFDC for FSI errors
Change-Id: I2714d3b179406d35f7e460a6c0629c961083e6df
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/647
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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The same code was in a dozen places so I added a wrapper function.
Change-Id: I5b1d34e0f94b91289960c73670199ff22f4c6860
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/643
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: Ibe49dc935206775de032d397b2800a7b83208283
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/630
Tested-by: Jenkins Server
Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
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Change-Id: I2b73ceb44af6717e92f8ade682596496545fab51
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/581
Tested-by: Jenkins Server
Reviewed-by: Van H. Lee <vanlee@us.ibm.com>
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Task 4086
If the powerbus is alive we will use the remote master's OPB logic
directly instead of using the master proc's logic and cascading
through the MFSI port.
Added a target-specific mutex to handle concurrency issues.
Note - the new code path cannot be tested until XSCOM is completed
with Story 4382
I also modified some error handling to take care of errors exposed
by the fsipres testcase.
Verified on SALERNO and 2-proc VENICE models.
Change-Id: If48ddde60cef819ff6b921e00bdbab5027830be4
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/569
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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lease enter the commit message for your changes. Lines starting
Change-Id: I2927aa9a2c87296bc58a851062ea985659792dec
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/570
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Jenkins Server
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
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Change-Id: I282a764fbfb81cf13cc9d41ee275bafff478d20e
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/519
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Terry J. Opie <opiet@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: If7b45610dcd20f35f9f1d1442164a7485c4d7e14
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/504
Tested-by: Jenkins Server
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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Change-Id: I2eaef856d94a4d84db729e1f9d1e9b5b0f8d0845
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/496
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I28b4c114bdfb00a8f252bc4ce12a725f292c266b
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/495
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Also turned off the FSI init in the FSI and SCOM testcases because
it is now called by the istep code automatically.
Updated the centuar.chip file to add scom registers.
Change-Id: Icf1278808eeb67c1afdabf02b0ad08bc99c8ed40
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/477
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: Ic8fcd3c69330878e8e7a75ba6ba9d3c60aca6251
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/482
Tested-by: Jenkins Server
Reviewed-by: Mark W. Wenning <wenning@us.ibm.com>
Reviewed-by: Monte K. Copeland <copelanm@us.ibm.com>
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RTC Story 3792
- Added 7 more Venice targets and 7 more Centaur targets to the
simics_VENICE.system.xml to match the latest simics config
Note: remove Centaurs are currently disabled due to SW107421
- Modified testcases to be more tolerant of system config differences
- Changes to initialization flow to be more tolerant of missing
chips
- Expanded the size of the HB_DATA section of PNOR to hold the
additional targets (up to 128KB space now, actual is 36KB)
Change-Id: Ic92708ccb147fb18bf992ef3ac318a287d32fafe
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/445
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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There are a group of attributes defined for FSI now.
-ATTR_FSI_MASTER_CHIP
-ATTR_FSI_MASTER_TYPE
-ATTR_FSI_MASTER_PORT
-ATTR_FSI_SLAVE_CASCADE
-ATTR_FSI_OPTION_FLAGS
Also includes work for Story 3996. The attributes are now broken
into 3 distinct pieces:
- attribute_types.xml : defines hostboot attributes
- target_types.xml : defines different types of targets
- XXX.system.xml : system-specific information, equivalent to what
we'll get from system workbook
These are then used to generic system-specific binaries, currently
for 3 platforms:
- simics_SALERNO_targeting.bin
- simics_VENICE_targeting.bin
- vbu_targeting.bin
Change-Id: I2bf920cc62cceb761ab44a07df433da44249d0e0
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/426
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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This code will initialize the FSI hardware and allow access
to remote slaves.
Note - current code is hardcoded to using the MFSI-0 port on the
master processor wrapped back into its own CFAM.
Note2 - One testcase is disabled pending integration of required
fixes to the simics models.
Contains work for
- Task 3830 : FSI Master Regs
- Task 3831 : FSI Slave Regs
Change-Id: I8dd5f0e03cf083e35cf8241db22ad6d76ba85fac
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/359
Tested-by: Jenkins Server
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: ADAM R. MUHLE <armuhle@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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Change-Id: I521870c1f11fb33ae3829b96c6c0fca18c1a0c62
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/391
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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-Initial work for FSI Device Driver (Story 3334)
-Read/Write interface (Story 3550)
Code is capable of basic read and write operations provided that the
Simics models are updated
Note: contains early work for FSI Initialization that should be ignored for now
Change-Id: I08e795422de127b62c2d1629d7a4e0f12b21e348
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/287
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
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