Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | PRD: PLL analysis support for Axone | Zane Shelley | 2018-12-12 | 1 | -1/+13 |
* | PRD: Created Nimbus specific rule files | Zane Shelley | 2018-11-07 | 1 | -7/+7 |
* | PRD: Created Cumulus specific rule files | Zane Shelley | 2018-11-07 | 1 | -14/+14 |
* | PRD: wrong target used in PLL analysis code | Zane Shelley | 2018-10-18 | 1 | -3/+3 |
* | PRD: Correct interpretation of PLL error bits in TP error register | Benjamin Weisenbeck | 2018-10-08 | 1 | -6/+44 |
* | PRD: Separate PLL handling by domain type | Benjamin Weisenbeck | 2018-08-23 | 1 | -2/+33 |
* | PRD: incorrect CFAM register addresses used in Hostboot | Zane Shelley | 2018-07-17 | 1 | -1/+1 |
* | PRD: Cleanup RC handling in PLL code | Benjamin Weisenbeck | 2018-06-14 | 1 | -6/+5 |
* | PRD: Cumulus rule file updates | Zane Shelley | 2017-10-09 | 1 | -7/+12 |
* | PRD: Reorganized some pll code | Benjamin Weisenbeck | 2017-09-05 | 1 | -128/+45 |
* | PRD: Fix xbus pll reg access issue | Benjamin Weisenbeck | 2017-09-01 | 1 | -8/+40 |
* | PRD: Use MCBIST target to collect MC PLL registers | Benjamin Weisenbeck | 2017-04-26 | 1 | -8/+8 |
* | PRD: updates to TP_LFIR[21] | Zane Shelley | 2017-02-16 | 1 | -19/+11 |
* | PRD: PLL analysis updates | Benjamin Weisenbeck | 2017-01-31 | 1 | -32/+396 |
* | PRD: Check TPLFIR[21] for pll unlock | Benjamin Weisenbeck | 2016-11-14 | 1 | -10/+18 |
* | PRD: PLL update after FIR review | Benjamin Weisenbeck | 2016-08-24 | 1 | -7/+11 |
* | PRD: added getTrgtType iipchip.h | Zane Shelley | 2016-07-26 | 1 | -7/+6 |
* | PRD: PLL Analysis | Benjamin Weisenbeck | 2016-07-18 | 1 | -0/+216 |