summaryrefslogtreecommitdiffstats
path: root/src/import
Commit message (Expand)AuthorAgeFilesLines
* Change ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING nameThi Tran2019-02-281-7/+7
* p9_query_mssinfo for single chip mss information query.xiaozq2019-02-281-0/+470
* Added the HWP error XML file for the DDIM SPD data mapping functionRoland Veloz2019-02-281-0/+270
* HWP:Cache stop clocks complete fixPrasad Bg Ranganath2019-02-271-0/+9
* PM HWP: Fix bug in stop clock procedure that effects mpiplPrasad Bg Ranganath2019-02-273-25/+39
* Port-over generic SPD attributes that shouldn't change per controllerAndre Marin2019-02-271-50/+49
* Back out p9a_10 engd that breaks the initcompiler.Ben Gass2019-02-271-2/+1
* Adds initfile for ExplorerBen Gass2019-02-274-0/+661
* Add empty bulk_pwr and utils_to_throttle header files for HB mirrorAndre Marin2019-02-264-0/+96
* Adds DDIMM EFD decoder APIStephen Glancy2019-02-261-1/+16
* Fixes LRDIMM training issueLi Meng2019-02-261-14/+47
* Reinstates exp_draminit_mc with change_addr_mux_sel fixAlvin Wang2019-02-2417-308/+850
* Add empty pos, c_str files to split dimm specializationAndre Marin2019-02-234-0/+96
* Revert "Adds exp_draminit_mc"Jennifer A. Stofer2019-02-223-142/+0
* Adds exp_draminit_mcAlvin Wang2019-02-223-0/+142
* Add new MSS attributes for AxoneLouis Stermole2019-02-221-0/+94
* Adds empty files for exp_draminit_mc and p9a_omi_trainAlvin Wang2019-02-222-0/+48
* Add generic attribute accessor script and makefilesLouis Stermole2019-02-221-0/+2673
* Adjust PVR Version for AxoneJenny Huynh2019-02-221-0/+17
* Adds blank files for generic bad bits codeStephen Glancy2019-02-222-0/+50
* Add new algorithm for MREP and error logshlimeng2019-02-223-236/+253
* Axone pibmem repair logicRaja Das2019-02-224-85/+331
* Update p9a_10 engd - spy name changesSoma BhanuTej2019-02-223-3/+13
* p9_sbe_npll_setup: Enable spread spectrum before starting PLLJoachim Fenkes2019-02-221-2/+3
* Adds RAS features to LRDIMM MRD_FINE and use fine_recorder classLi Meng2019-02-221-1/+13
* Adds new algorithm for DWLLi Meng2019-02-221-1/+14
* PM: fix cable pull issue in clearing clock sync upon PM Complex ResetGreg Still2019-02-221-11/+11
* P9 Obus MNFG Errors Attribute FixChris Steffen2019-02-221-3/+3
* PM HWP: Fixed error path bug pertaining to query STOP state.Prem Shanker Jha2019-02-221-10/+12
* Add ATTR_ENABLED_OBUS_BRICKSDan Crowell2019-02-221-0/+15
* Adds the explorer training response structureStephen Glancy2019-02-222-24/+218
* Adds blank files for explorer training handlerStephen Glancy2019-02-223-0/+72
* Generalize set fields in pre_data_initAndre Marin2019-02-217-571/+699
* P9 Xbus/DMI CM WorkaroundChris Steffen2019-02-196-31/+134
* Create FAPI mapping function for DDIM SPD dataRoland Veloz2019-02-193-0/+881
* Add p9a_mss_volt procedureLouis Stermole2019-02-192-1/+95
* Add L1 procedures for p9a and makefilesAndre Marin2019-02-193-0/+62
* Add empty HWPs, UTs, and makefiles needed for AxoneAndre Marin2019-02-194-0/+96
* Add empty p9a unit test and axone_pre_data_engine files for HB mirroringAndre Marin2019-02-171-0/+24
* Add L1 procedures for p9a and makefilesAndre Marin2019-02-174-0/+28
* Add empty HWPs, UTs, and makefiles needed for AxoneAndre Marin2019-02-174-0/+96
* Explorer_inband support: add response data buffer to getRSPMatt Derksen2019-02-153-4/+23
* Fix tags in exp_omi_train attribute xmlChristian Geddes2019-02-151-5/+7
* Convert mss explorer and axone code to use attr accessorsLouis Stermole2019-02-151-0/+7
* Add new MSS attributes for AxoneLouis Stermole2019-02-151-0/+15
* Update setup_fw_boot_config() to read out actual values from attributesAlvin Wang2019-02-151-0/+146
* Port-over generic SPD attributes that shouldn't change per controllerAndre Marin2019-02-151-0/+749
* Add empty generic memory effective attr xml for HB to mirrorAndre Marin2019-02-151-0/+26
* Added initial copy of generic_memory_si_attributes.xmlAnuwat Saetow2019-02-151-0/+454
* Revert "Adds exp_draminit_mc"Jennifer A. Stofer2019-02-142-108/+0
OpenPOWER on IntegriCloud